Received: by 2002:a05:6a10:d5a5:0:0:0:0 with SMTP id gn37csp3533142pxb; Mon, 4 Oct 2021 04:30:57 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwcVe9HcpL+61Tmb7BjGw9mJSo8B8yN5jumxASHPx4G5oKrA4juiAhZxQlT5Cle95gBAepm X-Received: by 2002:a17:906:2405:: with SMTP id z5mr16388523eja.170.1633347057381; Mon, 04 Oct 2021 04:30:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633347057; cv=none; d=google.com; s=arc-20160816; b=TKvKtNyrLtLXeKzIcIqmed0eTqXQpFcIE64BJr29zuxjl3TqIQBthPzWErd/u7cGni DCL/stYdg/OAS1WCprNnJUn+elnNJLPYD+iM8V/GEMssvPAo4KqafexYscUEfXi/llQd wW4IAxuRYUsMfZ/9Nuouj+vVeq6bGFHNBnQgkZiO6Qltc1ezee1OeOxJ0Mjtney0fvsr a3NU19aCiIOrjfp+l2ekcbO+jFBocwU8CO12Ty7ei7Hv5J6M6SmYVc2tKP7D9sdCKdg9 bDx3QGSQdWt3c1uGLr1n1O/3LJYFkY1XbxWLrN0pyZzVaGS1Lv+VSxHQYz1HmRTFCWcK YAqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:content-language :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject; bh=QI3Mc5cKu7hJEtI0iWriGnQfnxNrxsLpAeLBDc6PMMk=; b=qKp+lNEw413IkZgVdMLE1ta5MGbK8T1iKzb82sTZELfsPCCvErKA3r/UhOGQKnD0N6 l8wZBiKqW69z9dYK1+WTbY0gCg5Tbg5d+/eKfaF6XFoKHKdVOoQh7X6YcEyBG8ETFDNm d9T7c1zHuRY6CUZeOIlI9vQGcaJuAggcidlwKZUOas8pz2iAd2m4rXkbL3aRf/gd53Lx rHjN8fNERS1S7pPS8v65epXIB0RVo8aIlvk96fOzkoZorBXDl2AQzAx2eJsDJYJ4M04M Py15F0hB/lmRenMHUL+CPcXJyLC12vgntwvJbtTGGEeN8AHK0KHPl/VjZlydUQ+Qi7uB ruQg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id 8si16215393ejd.70.2021.10.04.04.30.33; Mon, 04 Oct 2021 04:30:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232755AbhJDLay (ORCPT + 99 others); Mon, 4 Oct 2021 07:30:54 -0400 Received: from mail.kernel.org ([198.145.29.99]:35990 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232549AbhJDLax (ORCPT ); Mon, 4 Oct 2021 07:30:53 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id DC4ED61354; Mon, 4 Oct 2021 11:29:03 +0000 (UTC) Subject: Re: [PATCH] m68knommu: Remove MCPU32 config symbol To: Geert Uytterhoeven Cc: linux-m68k@lists.linux-m68k.org, linux-kernel@vger.kernel.org References: <20211004070231.2943362-1-geert@linux-m68k.org> From: Greg Ungerer Message-ID: <41cd6008-75c8-1fa7-dfc3-3bf843707db3@linux-m68k.org> Date: Mon, 4 Oct 2021 21:29:01 +1000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20211004070231.2943362-1-geert@linux-m68k.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4/10/21 5:02 pm, Geert Uytterhoeven wrote: > As of commit a3595962d82495f5 ("m68knommu: remove obsolete 68360 > support"), nothing selects MCPU32 anymore. > > Signed-off-by: Geert Uytterhoeven Thanks Geert. I'll push it into the m68knommu git tree. Regards Greg > arch/m68k/Kconfig.cpu | 11 ----------- > arch/m68k/include/asm/bitops.h | 2 +- > 2 files changed, 1 insertion(+), 12 deletions(-) > > diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu > index 277d61a094637ce3..0d00ef5117dceed9 100644 > --- a/arch/m68k/Kconfig.cpu > +++ b/arch/m68k/Kconfig.cpu > @@ -53,17 +53,6 @@ config M68000 > System-On-Chip devices (eg 68328, 68302, etc). It does not contain > a paging MMU. > > -config MCPU32 > - bool > - select CPU_HAS_NO_BITFIELDS > - select CPU_HAS_NO_CAS > - select CPU_HAS_NO_UNALIGNED > - select CPU_NO_EFFICIENT_FFS > - help > - The Freescale (was then Motorola) CPU32 is a CPU core that is > - based on the 68020 processor. For the most part it is used in > - System-On-Chip parts, and does not contain a paging MMU. > - > config M68020 > bool "68020 support" > depends on MMU > diff --git a/arch/m68k/include/asm/bitops.h b/arch/m68k/include/asm/bitops.h > index 7b414099e5fc20fa..7b93e1fd8ffa902f 100644 > --- a/arch/m68k/include/asm/bitops.h > +++ b/arch/m68k/include/asm/bitops.h > @@ -451,7 +451,7 @@ static inline unsigned long ffz(unsigned long word) > * generic functions for those. > */ > #if (defined(__mcfisaaplus__) || defined(__mcfisac__)) && \ > - !defined(CONFIG_M68000) && !defined(CONFIG_MCPU32) > + !defined(CONFIG_M68000) > static inline unsigned long __ffs(unsigned long x) > { > __asm__ __volatile__ ("bitrev %0; ff1 %0" >