Received: by 2002:a05:6a10:d5a5:0:0:0:0 with SMTP id gn37csp4198453pxb; Mon, 4 Oct 2021 20:17:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxsDacJzP2O6BDtHjC88N1v4QbDSzBqtkFy3e0S+pBWZgf6l+kZLvT2dkmTPivfTyst0JtW X-Received: by 2002:a05:6402:154:: with SMTP id s20mr22940341edu.253.1633403869262; Mon, 04 Oct 2021 20:17:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633403869; cv=none; d=google.com; s=arc-20160816; b=AKF8KJDjqjjbGOeLh72MQarrnYuIJmHqPK0N25zVo8BO0Z8MQjKy3dSuZprQCTRHAj QRjbmnOYQWTzEZodQ8AMKZK8WGudfSq2XahOYq74h33AT27xfS5GNHSopuxX/L4wvXUS W0zvXOUl/uduVHVBgjBePt65YEpk4YRFgS38ZEfwk6TK8bwhqisKFlj+nz8GTwtbhYTB CCXHQwxstoBsgMTuKqc3jmJYoVEbtXtjFofSAMcgfQHSjylJLYRpXb7/VYN0+pF1zIDo 46duZ7kpjvOa1vfwA38Dj/WNPhtoH/HCRo+1InQ+MqlzEqefj3BSxUuzVEJa2xfAujR4 R76w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=2eGuF9yrfRZ7HYMXv0FDGrrnI1fdkBivhcQ+vOGTxCg=; b=lDWz7sSwU0dYru+bzbwyaIhUT33fSuEtBree0oh8VId+0DHpkxtXumrXSw3SG6iadQ dp+phKz3PB0l8hrGS8SBREAq1+rtKF3zuSbl+ItkDTNfT6Phnd/q0tJOOzDLY5d+Eayp rcOSCEYVwypk8EqyjkdB+ZbOwss2gJ55YIMIVHnJijxpRON0p2wvajdFElwlan5A9kzQ Ki/WrRq9tR1UyQgjXRjau8JtZh71nBVTbwAH7DrTZeemRFMfpaHmQy1TFHYCBOHpR64k FpGDuXOy9b9tQrTU9koJRSX3V7NnVzC9k+eT035BTVJwo5u1zTdH2B+W9kTWrtBtDWHh LoxA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ik3kKEdb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id o8si29480752ejy.260.2021.10.04.20.17.26; Mon, 04 Oct 2021 20:17:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ik3kKEdb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231466AbhJEDN6 (ORCPT + 99 others); Mon, 4 Oct 2021 23:13:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57298 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231520AbhJEDN5 (ORCPT ); Mon, 4 Oct 2021 23:13:57 -0400 Received: from mail-oi1-x236.google.com (mail-oi1-x236.google.com [IPv6:2607:f8b0:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 219C9C061753 for ; Mon, 4 Oct 2021 20:12:08 -0700 (PDT) Received: by mail-oi1-x236.google.com with SMTP id o4so405861oia.10 for ; Mon, 04 Oct 2021 20:12:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=2eGuF9yrfRZ7HYMXv0FDGrrnI1fdkBivhcQ+vOGTxCg=; b=ik3kKEdbd7mUnND8jQw8zVgpqV28vtfrJ1ITkytt48hNs5tiTSkdzvvNIP3y0t4qLF ygWx/AuiV7/G5O0Kj7qtQHJTFKg9TvgQdrUcOdjdQRtXCKh4R3T9Lb9KMNx2Lh2dKSQU EM0zYItI2DsAfwBht5VbgfRr61aHz9/OBRH7I1FR0Q7F2tUKsbMdX/9NTAFBiwLkZEEG mfWBhKrjuuV0lSmjm79vtHwZpc0ybcOULNLQDNtzlee9kk3dom8c5zkLv29tokvFBU8c wZuGVDduEA35pWKPe/I8BHmPPdGDEQetwvG3Ca33ZvrbaWpZA6lYKTaM3m/RaZ+lh16u 8kHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=2eGuF9yrfRZ7HYMXv0FDGrrnI1fdkBivhcQ+vOGTxCg=; b=ho2g5emGzlKJMuEAdsRgPzS8dAWT06SzIWUF8eKE6qxmHcp/YvrYAq2uoqOvRNGA9e EGzIscKIckynT0AkEUUJc7p7+7NLoBRz5XwOkU35yrF5Ci97FK48aVAx+Ta+YQLgOGVo 6ZoBPOJEk/myqLYVFhhKDKvuAteb67M0iS80r009POCB7bOxv1HiSjpRisJlPWBsObMM TYgLkSNoJrsSwvPCrlHXW58tVsPLvtuqDjn8NDuWWEQYPjBsLLyDjGEUZTX4U4vt1dc2 VCTxO1D8WWQ8a+p6UNefUGEjH+V5obLOo8e3HHL5MKGlQrc+95hlmQ1l57uJv4d188dI kWdw== X-Gm-Message-State: AOAM530sHxupaKIGXxHVWQccRDbzKeBppeBi4DssfD482m5Z78lHRMR7 8Zgo7l8cAFjKHZL6jbhsLhEyiQ== X-Received: by 2002:a05:6808:2188:: with SMTP id be8mr593263oib.44.1633403527316; Mon, 04 Oct 2021 20:12:07 -0700 (PDT) Received: from yoga ([2600:1700:a0:3dc8:c84c:8eff:fe1e:256f]) by smtp.gmail.com with ESMTPSA id q133sm3066758oia.55.2021.10.04.20.12.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Oct 2021 20:12:06 -0700 (PDT) Date: Mon, 4 Oct 2021 22:12:04 -0500 From: Bjorn Andersson To: Dmitry Baryshkov Cc: Matthias Kaehlcke , Andy Gross , Zhang Rui , Daniel Lezcano , Amit Kucheria , Rob Herring , Thara Gopinath , "open list:DRM DRIVER FOR MSM ADRENO GPU" , Linux PM , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list Subject: Re: [PATCH v2 4/4] arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones Message-ID: References: <20210923212311.2877048-1-bjorn.andersson@linaro.org> <20210923212311.2877048-5-bjorn.andersson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon 04 Oct 15:56 CDT 2021, Dmitry Baryshkov wrote: > On Mon, 4 Oct 2021 at 23:13, Bjorn Andersson wrote: > > > > On Wed 29 Sep 11:40 PDT 2021, Matthias Kaehlcke wrote: > > > > > On Thu, Sep 23, 2021 at 02:23:11PM -0700, Bjorn Andersson wrote: > > > > Downstream defines four ADC channels related to thermal sensors external > > > > to the PM8998 and two channels for internal voltage measurements. > > > > > > > > Add these to the upstream SDM845 MTP, describe the thermal monitor > > > > channels and add thermal_zones for these. > > > > > > > > Signed-off-by: Bjorn Andersson > > > > --- > > > > > > > > In addition to the iio channels exposed by v1, Daniel wanted thermal_zones... > > > > > > > > Changes since v1: > > > > - Enable the pm8998_adc_tm and describe the ADC channels > > > > - Add thermal-zones for the new channels > > > > > > > > arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 128 ++++++++++++++++++++++++ > > > > 1 file changed, 128 insertions(+) > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > > [..] > > > > +&pm8998_adc { > > > > + adc-chan@4c { > > > > + reg = ; > > > > + label = "xo_therm"; > > > > + }; > > > > + > > > > + adc-chan@4d { > > > > + reg = ; > > > > + label = "msm_therm"; > > > > + }; > > > > + > > > > + adc-chan@4f { > > > > + reg = ; > > > > + label = "pa_therm1"; > > > > + }; > > > > + > > > > + adc-chan@51 { > > > > + reg = ; > > > > + label = "quiet_therm"; > > > > + }; > > > > + > > > > + adc-chan@83 { > > > > + reg = ; > > > > + label = "vph_pwr"; > > > > + }; > > > > + > > > > + adc-chan@85 { > > > > + reg = ; > > > > + label = "vcoin"; > > > > + }; > > > > +}; > > > > + > > > > +&pm8998_adc_tm { > > > > + status = "okay"; > > > > + > > > > + xo-thermistor@1 { > > > > + reg = <1>; > > > > + io-channels = <&pm8998_adc ADC5_XO_THERM_100K_PU>; > > > > + qcom,ratiometric; > > > > + qcom,hw-settle-time-us = <200>; > > > > + }; > > > > + > > > > + msm-thermistor@2 { > > > > + reg = <2>; > > > > + io-channels = <&pm8998_adc ADC5_AMUX_THM1_100K_PU>; > > > > + qcom,ratiometric; > > > > + qcom,hw-settle-time-us = <200>; > > > > + }; > > > > + > > > > + pa-thermistor@3 { > > > > + reg = <3>; > > > > + io-channels = <&pm8998_adc ADC5_AMUX_THM3_100K_PU>; > > > > + qcom,ratiometric; > > > > + qcom,hw-settle-time-us = <200>; > > > > + }; > > > > + > > > > + quiet-thermistor@4 { > > > > + reg = <4>; > > > > + io-channels = <&pm8998_adc ADC5_AMUX_THM5_100K_PU>; > > > > + qcom,ratiometric; > > > > + qcom,hw-settle-time-us = <200>; > > > > + }; > > > > +}; > > > > + > > > > > > The example in the 'qcom,spmi-adc-tm5' binding specifies 'qcom,ratiometric' > > > and 'qcom,hw-settle-time-us' for both the ADC and the thermal monitor, so do > > > several board files (e.g. sm8250-mtp.dts and qrb5165-rb5.dts). This apparent > > > redundancy bothered me earlier, it's not really clear to me whether it's > > > needed/recommended or not. Do you happen to have any insights on this? > > > > Hmm, you're right and I missed this in defining my channels. I've not > > looked at this detail, just got reasonable readings from my thermal > > zones and was happy about that. > > > > Dmitry, do you have any further insights why these properties are > > supposed to be duplicated between the adc channel and the thermal zones? > > Because both ADC channel and thermal zone registers should be > programmed accordingly. > I presume our question is "why" to this particular part. The actual implementation thereof seems reasonable. Regards, Bjorn