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[23.128.96.18]) by mx.google.com with ESMTP id k26si3049957pgt.72.2021.10.05.07.16.04; Tue, 05 Oct 2021 07:16:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@mg.codeaurora.org header.s=smtp header.b=fDX5cno2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235433AbhJEOQJ (ORCPT + 99 others); Tue, 5 Oct 2021 10:16:09 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:44923 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235646AbhJEOPP (ORCPT ); Tue, 5 Oct 2021 10:15:15 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1633443205; h=Content-Transfer-Encoding: Content-Type: In-Reply-To: MIME-Version: Date: Message-ID: From: References: Cc: To: Subject: Sender; bh=Ca8ObLfwkUCcFB5ku5eG9KfNriIp5DWh1htHY0friCw=; b=fDX5cno2yz29ZLEmBdgK9LBvV8rQYHrK15P+YtX1UPb1cc+zb0YI0KXRkeRi1qFfvLLLk7Lu WtTFoOVQ9IP6Ee2WLJqY77ul+pkJuFbvkGBEa2+dfCusoXCWEhohMvWVRX8MaDchkPBs8krR 1Uk3Ta5/wULzC7UwkevQwJpIdLI= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-east-1.postgun.com with SMTP id 615c5d84b8ab9916b3a41be6 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 05 Oct 2021 14:13:24 GMT Sender: srivasam=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 77D67C1488D; Tue, 5 Oct 2021 14:13:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00, NICE_REPLY_A,SPF_FAIL autolearn=no autolearn_force=no version=3.4.0 Received: from [192.168.1.102] (unknown [157.48.255.211]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: srivasam) by smtp.codeaurora.org (Postfix) with ESMTPSA id 17E52C004E7; Tue, 5 Oct 2021 14:13:09 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 17E52C004E7 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org Subject: Re: [PATCH] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6 To: Pierre-Louis Bossart , agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz, tiwai@suse.com, srinivas.kandagatla@linaro.org, rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, judyhsiao@chromium.org Cc: Venkata Prasad Potturu References: <1633105471-30928-1-git-send-email-srivasam@codeaurora.org> From: Srinivasa Rao Mandadapu Organization: Qualcomm India Private Limited. Message-ID: <2c18ff0c-cd24-356c-0104-086837ed7ff0@codeaurora.org> Date: Tue, 5 Oct 2021 19:43:06 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/1/2021 11:27 PM, Pierre-Louis Bossart wrote: Thanks for Your time Bossart!!! >> @@ -610,6 +611,12 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl) >> val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index); >> val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index); >> >> + if (ctrl->swrm_hctl_reg) { >> + val = ioread32(ctrl->swrm_hctl_reg); >> + val &= 0xFFFFFFFD; > magic value, use a #define MASK_SOMETHING? Okay. will update it. > >> + iowrite32(val, ctrl->swrm_hctl_reg); >> + } >> + >> ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val); >> >> /* Enable Auto enumeration */ >> @@ -1200,7 +1207,7 @@ static int qcom_swrm_probe(struct platform_device *pdev) >> struct qcom_swrm_ctrl *ctrl; >> const struct qcom_swrm_data *data; >> int ret; >> - u32 val; >> + int val, swrm_hctl_reg = 0; >> >> ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); >> if (!ctrl) >> @@ -1251,6 +1258,9 @@ static int qcom_swrm_probe(struct platform_device *pdev) >> ctrl->bus.port_ops = &qcom_swrm_port_ops; >> ctrl->bus.compute_params = &qcom_swrm_compute_params; >> >> + if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg)) >> + ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4); > if (!ctrl->swrm_hctl_reg) > return -ENODEV; > > ? I think here error check is not required, as this change is required only for soundwire version 1.6 and above. >> + >> ret = qcom_swrm_get_port_config(ctrl); >> if (ret) >> goto err_clk; >> -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.