Received: by 2002:a05:6a10:d5a5:0:0:0:0 with SMTP id gn37csp5168016pxb; Tue, 5 Oct 2021 19:42:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx4JwnGAUKsIC2q0jBO3lzIZQP8oq9v53ux8N2Fk3VA1qo3MxNBf5KDxz1eByZRekIMSbaD X-Received: by 2002:a17:90a:55cb:: with SMTP id o11mr8068908pjm.244.1633488158927; Tue, 05 Oct 2021 19:42:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633488158; cv=none; d=google.com; s=arc-20160816; b=iFeuBD7dZA61AMs5zsHn8MB0vYFeHec2uSLypyi0tZ1On9bnHgwPJbVU//wPXajDsn ZgbYQ7qLcbGaPDNKbe38cNV3rfA7LUNN7j5A/3uCo4k2hssebR6LBynJO/hv8TSRFTlo srgGigiSJU7xwXFGAm4wUMzjB8u4XyaOI7z0jGB3fUdmd/AShhlKU3nlCYv5CDt1W60S TpGsBux0qhP3LMI6eML5/kjCRi7ykVPqby8npwXKIsmfiepZqZHvuDbl2yfv9svTyuP0 D9PEVc0Nq+IHfGd6dq2U5/a30wLbeJW6StdBtMi/XHgrifrrdgQOnftvbfCM9Y5fTIyR kExw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=RRg7qaSkYFTmSpOqY6x05C6jG3RXAAV6AEUBcClpAI0=; b=fbKnsaxU17DNo6+yB8dHgp25GnWeXww28sq8JUQgQWYue5EyCLHO7vlu0kgnWYAth3 TsT7pTr+KhuPVocm+TXB1VRO7I31dMyVScpmSACO6jjTIpA/L+MulJQKjk+SBOduHnV5 N7RyV43892n9cFP339aB5L6Bh/hDslJWeuII7UUgdWY5hNFzujWFSLp1vn+4HtMlWYXv Uedivqjv/bL0oHZrZLaRFOfVpasq1Xr9P7kviZc3/ZLH3IglB/CQr7YcX2M2SptW2tLb 6O+shh/14T4HUKIpF36CcHZRQf1OeeM3qUcWM1X20pbHhQuCFOc6CDia/ZergdvBO9Sh 39bw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=DiErW2Ji; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r21si22393834pgr.546.2021.10.05.19.42.17; Tue, 05 Oct 2021 19:42:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=DiErW2Ji; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237204AbhJFCnY (ORCPT + 99 others); Tue, 5 Oct 2021 22:43:24 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:24640 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229908AbhJFCnX (ORCPT ); Tue, 5 Oct 2021 22:43:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1633488091; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RRg7qaSkYFTmSpOqY6x05C6jG3RXAAV6AEUBcClpAI0=; b=DiErW2JiPI4SSogIZd7hqe38/Xa7rdnG72o3COs4yEHWkCWEapvOVlKGUfVIkqSQGyYq3p FV9v8fWYBNbeImD9b++dBtVbIf31G0YqHywVSS8biScX+qlmAD1GZk4VF8Td2Lstk/qeFc p2TOLizSOrhS9FffOKHpydUQfNKPi7Y= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-170-AIks4-1-O--jwvjN8Om7uQ-1; Tue, 05 Oct 2021 22:41:28 -0400 X-MC-Unique: AIks4-1-O--jwvjN8Om7uQ-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id E9F8E835DE2; Wed, 6 Oct 2021 02:41:25 +0000 (UTC) Received: from Ruby.lyude.net (unknown [10.22.16.47]) by smtp.corp.redhat.com (Postfix) with ESMTP id 883739AA38; Wed, 6 Oct 2021 02:41:21 +0000 (UTC) From: Lyude Paul To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, nouveau@lists.freedesktop.org Cc: stable@vger.kernel.org, Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Daniel Vetter , =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Sean Paul , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 1/5] drm/i915: Add support for panels with VESA backlights with PWM enable/disable Date: Tue, 5 Oct 2021 22:40:14 -0400 Message-Id: <20211006024018.320394-2-lyude@redhat.com> In-Reply-To: <20211006024018.320394-1-lyude@redhat.com> References: <20211006024018.320394-1-lyude@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This simply adds proper support for panel backlights that can be controlled via VESA's backlight control protocol, but which also require that we enable and disable the backlight via PWM instead of via the DPCD interface. We also enable this by default, in order to fix some people's backlights that were broken by not having this enabled. For reference, backlights that require this and use VESA's backlight interface tend to be laptops with hybrid GPUs, but this very well may change in the future. Signed-off-by: Lyude Paul Link: https://gitlab.freedesktop.org/drm/intel/-/issues/3680 Fixes: fe7d52bccab6 ("drm/i915/dp: Don't use DPCD backlights that need PWM enable/disable") Cc: # v5.12+ --- .../drm/i915/display/intel_dp_aux_backlight.c | 24 ++++++++++++++----- 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c index 569d17b4d00f..594fdc7453ca 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c @@ -293,6 +293,10 @@ intel_dp_aux_vesa_enable_backlight(const struct intel_crtc_state *crtc_state, struct intel_panel *panel = &connector->panel; struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); + if (!panel->backlight.edp.vesa.info.aux_enable) + panel->backlight.pwm_funcs->enable(crtc_state, conn_state, + panel->backlight.pwm_level_max); + drm_edp_backlight_enable(&intel_dp->aux, &panel->backlight.edp.vesa.info, level); } @@ -304,6 +308,10 @@ static void intel_dp_aux_vesa_disable_backlight(const struct drm_connector_state struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); drm_edp_backlight_disable(&intel_dp->aux, &panel->backlight.edp.vesa.info); + + if (!panel->backlight.edp.vesa.info.aux_enable) + panel->backlight.pwm_funcs->disable(old_conn_state, + intel_backlight_invert_pwm_level(connector, 0)); } static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector, enum pipe pipe) @@ -321,6 +329,15 @@ static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector, if (ret < 0) return ret; + if (!panel->backlight.edp.vesa.info.aux_enable) { + ret = panel->backlight.pwm_funcs->setup(connector, pipe); + if (ret < 0) { + drm_err(&i915->drm, + "Failed to setup PWM backlight controls for eDP backlight: %d\n", + ret); + return ret; + } + } panel->backlight.max = panel->backlight.edp.vesa.info.max; panel->backlight.min = 0; if (current_mode == DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD) { @@ -340,12 +357,7 @@ intel_dp_aux_supports_vesa_backlight(struct intel_connector *connector) struct intel_dp *intel_dp = intel_attached_dp(connector); struct drm_i915_private *i915 = dp_to_i915(intel_dp); - /* TODO: We currently only support AUX only backlight configurations, not backlights which - * require a mix of PWM and AUX controls to work. In the mean time, these machines typically - * work just fine using normal PWM controls anyway. - */ - if ((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) && - drm_edp_backlight_supported(intel_dp->edp_dpcd)) { + if (drm_edp_backlight_supported(intel_dp->edp_dpcd)) { drm_dbg_kms(&i915->drm, "AUX Backlight Control Supported!\n"); return true; } -- 2.31.1