Received: by 2002:a05:6a10:d5a5:0:0:0:0 with SMTP id gn37csp357872pxb; Wed, 6 Oct 2021 06:32:55 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxlbsTOfPvXRBf+5M8WlybrnwrA1zwg1p5QRJzmBmtoQImq0Aecojo+snDndqxhugjE5rFN X-Received: by 2002:a17:906:2543:: with SMTP id j3mr2767349ejb.287.1633527175170; Wed, 06 Oct 2021 06:32:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633527175; cv=none; d=google.com; s=arc-20160816; b=jyhGJKA84zQwK6IZy6NiLV0/fCeMnKbwJkTOU6Hd/CQDXMAs/byS5A+iQmTnwuoIWS fI+A96g8vrSLYzNRf/FuyDFxSWQDVUwgZyOHNDHC7IrbUkoWYQPDjba0vbVlm8XYnvt4 VMRtYYL5IWsvhGpf9wkn8GuV70T/v1Nbsl6GFKg0mPu/SoxDq0b3RAnOwfkDEBg9QSU8 U675bPJ5wdp1tvjKAUxeiIPJIppB+Lv9G5XU7CpiJNZ6sM8g0YBVTe4ovA2pijbesUI1 SaS9L1T3GX9f5EtIaNAy5HONtRdPpu3aDFsaEOCLugNftT7m7FN2FElFMdiiXwHggbnr eHOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mx6o0oPcf47gHzPdvtDZDWzxILHrzRO5gW1z+aYy42Q=; b=J6YguLs9pSaNa2GvvieSzlO1kGVmYJ11aeTGNb3BHMwun9w5Zp1IuCInQWVmiMM7N6 2BIJnN190ivx8QO7BFEgzafCCgwneEMWw27Vxx/Ne0RXmfjzeeOHOlNpNRPskp1Ry99C 1vscu1mut6U/YBvb/wN7fFHigy/gwtGx2AFvZ6DbS8c9oQuvholKrHwcwy8L3sHUOCJr hUFMM84IMX4g7chFE7KBncA/0pChulzy4L9nIfxWKzPzva2HILQL62EBI3Fg3yvvus9O JmkCFlf5SSeNFD8s7LWCitPS2pefyExrwotb0cCiYLR4LECKyHyz3ziMJBWWToZ0eCpn 3iTA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=D1CTaao9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c7si490343edn.622.2021.10.06.06.32.26; Wed, 06 Oct 2021 06:32:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=D1CTaao9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238963AbhJFNc3 (ORCPT + 99 others); Wed, 6 Oct 2021 09:32:29 -0400 Received: from mail.kernel.org ([198.145.29.99]:49004 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238878AbhJFNcY (ORCPT ); Wed, 6 Oct 2021 09:32:24 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 706EA611C5; Wed, 6 Oct 2021 13:30:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1633527032; bh=oAjj3a5th2AgfOP48ScVgL0DU6/4UkedZYuH3CTvPBs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=D1CTaao9sov+lq4e13/Fkdw88wuC0/sypGxi+lIk8348uCrTH69iwe6zKp2aUXa6X YAwHoOJX58lifhDFr4ROhzhszSl+Axt/d+Z+bpfqerSktx/Y1L6sZmZ4InM9k0VnSi DBwKkIeD3efrhTu0gxXoVKRuM9ySLSu+dsdHCzOagHgl5NnQ7s05Q9jlQSDTxGJmjl 5JM8R1HuPoVwZb+SeYmOaJ4T6xHE4NYxj4/E/n1atpM9xyKkaSKozqdHCceNiclCxl YfUQf+8DineOKkmQitdB7hQouJpcR4qaBsCUp2/1IZCtVD0ts1S+ORpFQfDjg24iin SiUq6mf3UK0Ew== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Fares Mehanna , Paolo Bonzini , Sasha Levin , tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, x86@kernel.org, kvm@vger.kernel.org Subject: [PATCH MANUALSEL 5.14 7/9] kvm: x86: Add AMD PMU MSRs to msrs_to_save_all[] Date: Wed, 6 Oct 2021 09:30:19 -0400 Message-Id: <20211006133021.271905-7-sashal@kernel.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211006133021.271905-1-sashal@kernel.org> References: <20211006133021.271905-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Fares Mehanna [ Upstream commit e1fc1553cd78292ab3521c94c9dd6e3e70e606a1 ] Intel PMU MSRs is in msrs_to_save_all[], so add AMD PMU MSRs to have a consistent behavior between Intel and AMD when using KVM_GET_MSRS, KVM_SET_MSRS or KVM_GET_MSR_INDEX_LIST. We have to add legacy and new MSRs to handle guests running without X86_FEATURE_PERFCTR_CORE. Signed-off-by: Fares Mehanna Message-Id: <20210915133951.22389-1-faresx@amazon.de> Signed-off-by: Paolo Bonzini Signed-off-by: Sasha Levin --- arch/x86/kvm/x86.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 1e7d629bbf36..28b86f47fea5 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1327,6 +1327,13 @@ static const u32 msrs_to_save_all[] = { MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13, MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15, MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17, + + MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3, + MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3, + MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2, + MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5, + MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2, + MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5, }; static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)]; -- 2.33.0