Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
From:   Thomas Gleixner <tglx@linutronix.de>
To:     tip-bot2 for Borislav Petkov <tip-bot2@linutronix.de>,
        linux-tip-commits@vger.kernel.org
Cc:     Ser Olmy <ser.olmy@protonmail.com>, Borislav Petkov <bp@suse.de>,
        stable@vger.kernel.org, x86@kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [tip: x86/urgent] x86/fpu: Restore the masking out of reserved
 MXCSR bits
In-Reply-To: <163354193576.25758.8132624386883258818.tip-bot2@tip-bot2>
References: <YVtA67jImg3KlBTw@zn.tnic>
 <163354193576.25758.8132624386883258818.tip-bot2@tip-bot2>
Date:   Fri, 08 Oct 2021 01:40:14 +0200
Message-ID: <87mtnke74x.ffs@tglx>
MIME-Version: 1.0
Content-Type: text/plain
Precedence: bulk

On Wed, Oct 06 2021 at 17:38, tip-bot wrote:
> Ser bisected the problem to the commit in Fixes.
>
> tglx suggested reverting the rejection of invalid MXCSR values which
> this commit introduced and replacing it with what the old code did -
> simply masking them out to zero.
>
> Further debugging confirmed his suggestion:
>
>   fpu->state.fxsave.mxcsr: 0xb7be13b4, mxcsr_feature_mask: 0xffbf
>   WARNING: CPU: 0 PID: 1 at arch/x86/kernel/fpu/signal.c:384 __fpu_restore_sig+0x51f/0x540
>
> so restore the original behavior.
>
> Fixes: 6f9866a166cd ("x86/fpu/signal: Let xrstor handle the features to init")
> Reported-by: Ser Olmy <ser.olmy@protonmail.com>
> Signed-off-by: Borislav Petkov <bp@suse.de>
> Tested-by: Ser Olmy <ser.olmy@protonmail.com>
> Cc: <stable@vger.kernel.org>
> Link: https://lkml.kernel.org/r/YVtA67jImg3KlBTw@zn.tnic
> ---
>  arch/x86/kernel/fpu/signal.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
> index 445c57c..684be34 100644
> --- a/arch/x86/kernel/fpu/signal.c
> +++ b/arch/x86/kernel/fpu/signal.c
> @@ -379,9 +379,8 @@ static int __fpu_restore_sig(void __user *buf, void __user *buf_fx,
>  				     sizeof(fpu->state.fxsave)))
>  			return -EFAULT;
>  
> -		/* Reject invalid MXCSR values. */
> -		if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask)
> -			return -EINVAL;
> +		/* Mask out reserved MXCSR bits. */
> +		fpu->state.fxsave.mxcsr &= mxcsr_feature_mask;

can we please make this:

--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -384,9 +384,14 @@ static bool __fpu_restore_sig(void __use
 				     sizeof(fpu->state.fxsave)))
 			return false;
 
-		/* Reject invalid MXCSR values. */
-		if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask)
-			return false;
+		if (IS_ENABLED(CONFIG_X86_64)) {
+			/* Reject invalid MXCSR values. */
+			if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask)
+				return false;
+		} else {
+			/* Mask invalid bits out for historical reasons (broken hardware) */
+			fpu->state.fxsave.mxcsr &= ~mxcsr_feature_mask;
+		}
 
 		/* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */
 		if (use_xsave())

On a 64 bit kernel even 32bit user space which supplies broken mxcsr
values has to be considered malicious.

The 32bit story on those stone age machines is different because the
hardware is simply buggy and we can't differentiate between broken
hardware and broken or malicious software.

Thanks,

        tglx