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[23.128.96.18]) by mx.google.com with ESMTP id c11si1125511edw.382.2021.10.08.16.43.02; Fri, 08 Oct 2021 16:43:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=mqx3+t8D; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243774AbhJHXla (ORCPT + 99 others); Fri, 8 Oct 2021 19:41:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60678 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243832AbhJHXl3 (ORCPT ); Fri, 8 Oct 2021 19:41:29 -0400 Received: from mail-yb1-xb2c.google.com (mail-yb1-xb2c.google.com [IPv6:2607:f8b0:4864:20::b2c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8ACA3C061755 for ; Fri, 8 Oct 2021 16:39:33 -0700 (PDT) Received: by mail-yb1-xb2c.google.com with SMTP id n65so24374775ybb.7 for ; Fri, 08 Oct 2021 16:39:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=nmFzS3AbTLHxdnncfbOvzzEVI7phr9NSLef8AoPLTjM=; b=mqx3+t8D+JNOVWKdQ1Pga0ueYs2XLMy4d5Gy1AhlLlPXMz+5mtjl1gOKVWvmZ0RySb hczOVymBc69zb54sud6Zaz2/2qQZcts2POEpeEYbjUk4DwgbeHmRPZQfnNWyYFeoX/yU /KBWQPiqB2QEiJdiXI4Jb9o+u2fvkGLqWYeik= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=nmFzS3AbTLHxdnncfbOvzzEVI7phr9NSLef8AoPLTjM=; b=AmbU9A1N6eYy15S+1HK0bjnp8/NKlAVzRoBfwwibv7alBj6uc6JLf4biStv83W89w2 zo4NUTwzMLFmM/co3hOcg2KAR7oB/4qMbYzP18btUtH+LSFyVvPZAMze4dbvO7PHMwmr qp4+HPJ+HJQmcpvKVUK0bHWykTDE2F6+gQMt6pP1ZO1arGLoXyedeExwrUbb2YkGj5LV xokOu2IaFLTYd5ZWkCB+CIUOFjjevNzPDTGtNOZu7kNwksip8MXieylY+3LNa5tKebsi 5j5hWozuAZfsGKRhQ/njki81iF5sbNswyl/olx6/ynv8rwvhlDWlYr6xlyRWpYx8SPRt kRWg== X-Gm-Message-State: AOAM533F34h1x3SVW9TdSpJVv3jE+5WdKB5k/jtRP2U3+SSE3ZQzYgmY tOtWAPK5aukaeyKrnmB+k49lQI+Xzw6whiHWS96sDA== X-Received: by 2002:a25:cf07:: with SMTP id f7mr6786613ybg.100.1633736372830; Fri, 08 Oct 2021 16:39:32 -0700 (PDT) MIME-Version: 1.0 References: <20210929173343.v2.1.Ib7e63ae17e827ce0636a09d5dec9796043e4f80a@changeid> <20210929173343.v2.3.I630340a51130f4582dbe14e42f673b74e0531a2b@changeid> In-Reply-To: From: Philip Chen Date: Fri, 8 Oct 2021 16:39:21 -0700 Message-ID: Subject: Re: [PATCH v2 3/3] arm64: dts: sc7180: Support Parade ps8640 edp bridge To: Doug Anderson Cc: Stephen Boyd , LKML , Andy Gross , Bjorn Andersson , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-arm-msm Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Fri, Oct 8, 2021 at 4:13 PM Doug Anderson wrote: > > Hi, > > On Fri, Oct 8, 2021 at 11:46 AM Philip Chen wrote: > > > > Hi > > > > On Thu, Oct 7, 2021 at 11:15 AM Philip Chen wrote: > > > > > > Hi, > > > > > > On Thu, Sep 30, 2021 at 9:22 AM Doug Anderson wrote: > > > > > > > > Hi, > > > > > > > > On Wed, Sep 29, 2021 at 9:02 PM Stephen Boyd wrote: > > > > > > > > > > > + pp3300_brij_ps8640: pp3300-brij-ps8640 { > > > > > > + compatible = "regulator-fixed"; > > > > > > + status = "okay"; > > > > > > + regulator-name = "pp3300_brij_ps8640"; > > > > > > + > > > > > > + regulator-min-microvolt = <3300000>; > > > > > > + regulator-max-microvolt = <3300000>; > > > > > > + > > > > > > + gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>; > > > > > > > > > > Doesn't this need > > > > > > > > > > enable-active-high; > > > > > > > > Looks like it. Without that it looks like it assumes active low. > > > Thanks for catching this. > > > I'll fix it in v3. > > > > > > > > > > > > > > > > > + > > > > > > + pinctrl-names = "default"; > > > > > > + pinctrl-0 = <&en_pp3300_edp_brij_ps8640>; > > > > > > + > > > > > > + vin-supply = <&pp3300_a>; > > > > > > + }; > > > > > > +}; > > > > > > + > > > > > > +&dsi0_out { > > > > > > + remote-endpoint = <&ps8640_in>; > > > > > > > > > > Should this also have data-lanes to be "complete"? > > > > > > > > That's still back in the main trogdor.dtsi, isn't it? > > > Yes, I think so. > > > Plus, ti-sn65 dts doesn't define data-lanes for input either. > > Sorry, I was wrong. > > ti-sn65 dts actually defines data-lanes for input. > > However, since ps8640 driver doesn't parse input data-lanes for now, > > it's not useful to add data-lanes here anyway. > > Ah, right. This one _isn't_ in the dtsi. Looking closer, I agree with > you that it's not useful. Specifically it should be noted that, unlike > ti-sn65dsi86, this bridge part looks to only support 2-lanes of DP > traffic. If both of these two lanes are routed to the panel then > there's really nothing to specify--that should be the default > assumption of the driver if/when it ever adds support for data-lanes. Actually, dsi0_out is the input to the bridge. So the data lanes here are "MIPI DSI lanes", which is hardcoded to 4, for both sn65 driver and ps8640 driver, right? What's different in sn65 driver and ps8640 driver is the output data lanes for DP: * sn65 supports 1, 2, or 4 DP lanes. The driver parses DP "data lanes" from DT and then configures the support accordingly. * ps8640 supports 1 or 2 DP lanes. As of now, the driver doesn't parse DP "data lanes" from DT. As a result: * Adding input "data lanes" for either sn65 or ps8640 DT is not useful. * Adding output "data lanes" for sn65 DT is useful, while adding output "data lanes" for ps8640 DT is not useful. > > -Doug