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([2600:1700:dfe0:49f0:802c:b332:26e0:e0aa]) by smtp.gmail.com with ESMTPSA id l25sm1282837oot.36.2021.10.10.18.48.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 10 Oct 2021 18:48:04 -0700 (PDT) Message-ID: Date: Sun, 10 Oct 2021 18:48:02 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.1.2 Subject: Re: [net-next PATCH v5 02/14] dt-bindings: net: dsa: qca8k: Add SGMII clock phase properties Content-Language: en-US To: Ansuel Smith , Andrew Lunn , Vivien Didelot , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Russell King , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Matthew Hagan References: <20211011013024.569-1-ansuelsmth@gmail.com> <20211011013024.569-3-ansuelsmth@gmail.com> From: Florian Fainelli In-Reply-To: <20211011013024.569-3-ansuelsmth@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/10/2021 6:30 PM, Ansuel Smith wrote: > Add names and descriptions of additional PORT0_PAD_CTRL properties. > qca,sgmii-(rx|tx)clk-falling-edge are for setting the respective clock > phase to failling edge. > > Signed-off-by: Matthew Hagan > Signed-off-by: Ansuel Smith This should presumably have Matthew as the Author, so we would see a heading with: From: Matthew Hagan -- Florian