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Message-ID: <af433545-b5ce-053e-d381-ad11506a82e1@gmail.com>
Date:   Sun, 10 Oct 2021 19:46:32 -0700
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Subject: Re: [net-next PATCH v5 08/14] net: dsa: qca8k: add explicit SGMII PLL
 enable
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To:     Ansuel Smith <ansuelsmth@gmail.com>, Andrew Lunn <andrew@lunn.ch>,
        Vivien Didelot <vivien.didelot@gmail.com>,
        Vladimir Oltean <olteanv@gmail.com>,
        "David S. Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Russell King <linux@armlinux.org.uk>, netdev@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
References: <20211011013024.569-1-ansuelsmth@gmail.com>
 <20211011013024.569-9-ansuelsmth@gmail.com>
From:   Florian Fainelli <f.fainelli@gmail.com>
In-Reply-To: <20211011013024.569-9-ansuelsmth@gmail.com>
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On 10/10/2021 6:30 PM, Ansuel Smith wrote:
> Support enabling PLL on the SGMII CPU port. Some device require this
> special configuration or no traffic is transmitted and the switch
> doesn't work at all. A dedicated binding is added to the CPU node
> port to apply the correct reg on mac config.
> Fail to correctly configure sgmii with qca8327 switch and warn if pll is
> used on qca8337 with a revision greater than 1.
> 
> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian