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[23.128.96.18]) by mx.google.com with ESMTP id w6si12095903plg.188.2021.10.11.09.09.40; Mon, 11 Oct 2021 09:09:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=mlNCnyY4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233405AbhJKQKt (ORCPT + 99 others); Mon, 11 Oct 2021 12:10:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229556AbhJKQKs (ORCPT ); Mon, 11 Oct 2021 12:10:48 -0400 Received: from mail-yb1-xb35.google.com (mail-yb1-xb35.google.com [IPv6:2607:f8b0:4864:20::b35]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A3D3C06161C for ; Mon, 11 Oct 2021 09:08:48 -0700 (PDT) Received: by mail-yb1-xb35.google.com with SMTP id r1so40167213ybo.10 for ; Mon, 11 Oct 2021 09:08:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=R1IZZmHpZJEGprcsYAoU/nu0GgHlWLkOakQbKNK/k+g=; b=mlNCnyY4+Gk9mJudvL1KHNimChN7ceAZU9hjGcP5sZ7iTcoagcnLWxwUeYVNAyM+vp p/piW8IlvILBF5cUKYWqNUaWI66sa3uFU9Naizabxy2GVKcfUqgGMfsuB1mgpZel2lo+ szN7rwYLncZl2e/VXu26Ms3xhLiS8ymdIKMG9t1YfF2F5bxGN/wcMZRdt+brJj568bcP qH5wo6vjFzazyqt79hptbGV3TRra5D1HsJN1T6gSj3jv9NoaVr4pjCXprrPHV4KVI9vf 6yWPNM6BteQ3qVlijR70EhltzdADxwVmmDrTEcyaCdTtckBo3z5eSUX84kL88do0j+sH WNYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=R1IZZmHpZJEGprcsYAoU/nu0GgHlWLkOakQbKNK/k+g=; b=i/BH8D0i7M3oI5wK65CnxiLcXQO8q3FMwZ1Qq5kP3MZVqIVzmmjHCy3wZ/FjCFN9Tt j0p9yGfRUHX2L9/vJ93gDnbxwThK22BuJs+wQLxAnqTX4XWR6u/w1rmgV2fV0BlUXMTC 1c85zZxKowUFuipPT1MEB2po9ulxg4NLJeg6/oCj5zkxaTc16kjrnOtyktufOdhfRbyG uWmvkOIjzW3NRYq502Ue+CfQc00MEXGkIkSwH5BQ3M8dl9TpMInEm+ik2TTSW9sgkQ50 bM7TXcsJKHtTbGIweSRqwKSf17FaDtMLAa6Sv2U9i85CJqHJn1DnvchIebdZqAU6T8VR xp8w== X-Gm-Message-State: AOAM530VsuRMTxOep621iDtO0vfqaAQZgq2aePZWbK49Blvp2eT/RZa4 fqcn5XDx3PxlaI3Rr/2JGP/NTyPN2O7u+1T67KF8Bw== X-Received: by 2002:a25:2f8e:: with SMTP id v136mr22214178ybv.350.1633968527209; Mon, 11 Oct 2021 09:08:47 -0700 (PDT) MIME-Version: 1.0 References: <20211007233439.1826892-1-rananta@google.com> <20211007233439.1826892-4-rananta@google.com> <87y270ou3y.wl-maz@kernel.org> In-Reply-To: <87y270ou3y.wl-maz@kernel.org> From: Raghavendra Rao Ananta Date: Mon, 11 Oct 2021 09:08:36 -0700 Message-ID: Subject: Re: [PATCH v8 03/15] KVM: arm64: selftests: Use read/write definitions from sysreg.h To: Marc Zyngier Cc: Paolo Bonzini , Andrew Jones , James Morse , Alexandru Elisei , Suzuki K Poulose , Catalin Marinas , Will Deacon , Peter Shier , Ricardo Koller , Oliver Upton , Reiji Watanabe , Jing Zhang , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marc, On Mon, Oct 11, 2021 at 1:15 AM Marc Zyngier wrote: > > Hi Raghavendra, > > On Fri, 08 Oct 2021 00:34:27 +0100, > Raghavendra Rao Ananta wrote: > > > > Make use of the register read/write definitions from > > sysreg.h, instead of the existing definitions. A syntax > > correction is needed for the files that use write_sysreg() > > to make it compliant with the new (kernel's) syntax. > > > > Signed-off-by: Raghavendra Rao Ananta > > Reviewed-by: Oliver Upton > > Reviewed-by: Andrew Jones > > --- > > .../selftests/kvm/aarch64/debug-exceptions.c | 28 +++++++++---------- > > .../selftests/kvm/include/aarch64/processor.h | 13 +-------- > > 2 files changed, 15 insertions(+), 26 deletions(-) > > > > diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c > > index e5e6c92b60da..11fd23e21cb4 100644 > > --- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c > > +++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c > > @@ -34,16 +34,16 @@ static void reset_debug_state(void) > > { > > asm volatile("msr daifset, #8"); > > > > - write_sysreg(osdlr_el1, 0); > > - write_sysreg(oslar_el1, 0); > > + write_sysreg(0, osdlr_el1); > > + write_sysreg(0, oslar_el1); > > The previous patch has obviously introduced significant breakage which > this patch is now fixing. In the interval, the build is broken, which > isn't great. > > You can either rework this series to work around the issue, or I can > squash patches #2 and #3 together. Thanks. I didn't realize this. I'm fine with you squashing the patches together (I guess I would do the same). Regards, Raghavendra > > Thanks, > > M. > > -- > Without deviation from the norm, progress is not possible.