Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp1814995pxb; Mon, 11 Oct 2021 13:48:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw9WgZs6wT6V8GPx0jJ2+CdX5zU8KHQ1Tz4h2MGV/ORzYnqzR0dAI0TSQieBVdYWX8HX9qF X-Received: by 2002:a63:4520:: with SMTP id s32mr19815969pga.27.1633985323706; Mon, 11 Oct 2021 13:48:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633985323; cv=none; d=google.com; s=arc-20160816; b=fwM+RJtvgfygMHIT1T85JqrwWipS0WbMxcFyD5D0kGhikMx6GEADVbD9d2VLGUrVv1 KxCkb6ZUhTAhJuPCd7ig9Cj4bbs+SuJrPEEHnogiI9nydkiC+abSzhogwrK4IFXj2agY GwvkXpTofxFPz+wQFeqi6G4j0dRAB9VU1C+b1WFNIMhVtw5TFFQKX3CZ41uIQBF7O8b9 uMS7/utUbwdh3O3nzaBZpu/3IbV62Vvxo85oYvRVf/xS+oyYgShE/Yy3Vfanxthc/fcN rbjkbh1xBV8IEbtMa3GgM6dbgZHDmuDbVLa2THp8V0Rj8AQPynFIy/SVpaOv0rvTYfTM wn+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=on8W3HPPfhJxHFSTbC30TeTqZ/NdxJ0M2DbWqQ2CJCY=; b=o229kMYXD7CUJ5R12XSsp4TSxd2+slMmJDgVg5g0qg0lRWU6LwsGt2yPFYSMWwmGQ+ YNOyKGJiBa/2hBIr/Eghk3gbHhauyyzswq5IHvDN+guNITtkCCSs+f2xILHIjO6tDUD1 JnRV+S8wFJsig3iIZlFhTCgPOSgxpORNZy6slSIYLSOt4PvZXAm3zJBpj6J1mGcmpPCG mG3Yvfje/QEzi5tW62gTyDCk19dJqX4gqThW3GZ0+e2L1nWFAIN+Xlk7yY01IdKHYzhn b2Q+75hMXiKbkdW+7BlY0iL2cncwIdHdJLFyE4oW5UyhToZLR4zcNH9VrIVDx+0MXVem 1Htg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=IKP5tfY0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f15si13096661pgm.374.2021.10.11.13.48.30; Mon, 11 Oct 2021 13:48:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=IKP5tfY0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235071AbhJKUtO (ORCPT + 99 others); Mon, 11 Oct 2021 16:49:14 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:60146 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234618AbhJKUtO (ORCPT ); Mon, 11 Oct 2021 16:49:14 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 19BKksYE036494; Mon, 11 Oct 2021 15:46:54 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1633985214; bh=on8W3HPPfhJxHFSTbC30TeTqZ/NdxJ0M2DbWqQ2CJCY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=IKP5tfY0w35lyYOnrrR2LD22aZXC85Z+5DWM/5Pkt0B287UAaWGBDGjOi+IPfLX65 KhpRhCgIsRl2HISVvq2pVDRbunGUBuBvu/+CN5OjZQMV8pLbCekWmbbnH6nDsnFxN/ dSX3MTzGP99AWgNzTWSS/XMYzrBaBkcnz0CwYkoU= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 19BKksiO055277 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 11 Oct 2021 15:46:54 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Mon, 11 Oct 2021 15:46:54 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Mon, 11 Oct 2021 15:46:54 -0500 Received: from LT5CD112GSQZ.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 19BKkKEj069811; Mon, 11 Oct 2021 15:46:49 -0500 From: Apurva Nandan To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Mark Brown , Apurva Nandan , Patrice Chotard , Christophe Kerello , Boris Brezillon , , , CC: Subject: [PATCH v2 05/14] mtd: spinand: Add adjust_op() in manufacturer_ops to modify the ops for manufacturer specific changes Date: Tue, 12 Oct 2021 02:16:10 +0530 Message-ID: <20211011204619.81893-6-a-nandan@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211011204619.81893-1-a-nandan@ti.com> References: <20211011204619.81893-1-a-nandan@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Manufacturers might use a variation of standard SPI NAND flash instructions, e.g. Winbond W35N01JW changes the dummy cycle length for read register commands when in Octal DTR mode. Add new function in manufacturer_ops: adjust_op(), which can be called to correct the spi_mem op for any alteration in the instruction made by the manufacturers. And hence, this function can also be used for incorporating variations of SPI instructions in Octal DTR mode. Datasheet: https://www.winbond.com/export/sites/winbond/datasheet/W35N01JW_Datasheet_Brief.pdf Signed-off-by: Apurva Nandan --- drivers/mtd/nand/spi/core.c | 3 +++ include/linux/mtd/spinand.h | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 4da794ae728d..8e6cf7941a0f 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -61,6 +61,9 @@ static void spinand_patch_op(const struct spinand_device *spinand, op->data.buswidth = op_buswidth; op->data.dtr = op_is_dtr; } + + if (spinand->manufacturer->ops->adjust_op) + spinand->manufacturer->ops->adjust_op(op, spinand->reg_proto); } static void spinand_patch_reg_op(const struct spinand_device *spinand, diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index f6093cd98d7b..ebb19b2cec84 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -257,6 +257,8 @@ struct spinand_devid { /** * struct manufacurer_ops - SPI NAND manufacturer specific operations * @init: initialize a SPI NAND device + * @adjust_op: modify the ops for any variation in their cmd, address, dummy or + * data phase by the manufacturer * @cleanup: cleanup a SPI NAND device * * Each SPI NAND manufacturer driver should implement this interface so that @@ -264,6 +266,8 @@ struct spinand_devid { */ struct spinand_manufacturer_ops { int (*init)(struct spinand_device *spinand); + void (*adjust_op)(struct spi_mem_op *op, + const enum spinand_proto reg_proto); void (*cleanup)(struct spinand_device *spinand); }; -- 2.25.1