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[23.128.96.18]) by mx.google.com with ESMTP id j18si19973168edw.612.2021.10.11.15.08.52; Mon, 11 Oct 2021 15:09:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235477AbhJKWGp (ORCPT + 99 others); Mon, 11 Oct 2021 18:06:45 -0400 Received: from gloria.sntech.de ([185.11.138.130]:59122 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235301AbhJKWGn (ORCPT ); Mon, 11 Oct 2021 18:06:43 -0400 Received: from ip5f5a6e92.dynamic.kabel-deutschland.de ([95.90.110.146] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1ma3PM-00016Q-QT; Tue, 12 Oct 2021 00:04:32 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring , linux-riscv@lists.infradead.org Cc: Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Anup Patel , Anup Patel Subject: Re: [PATCH v8 1/8] RISC-V: Enable CPU_IDLE drivers Date: Tue, 12 Oct 2021 00:04:31 +0200 Message-ID: <30695639.mNO2d7px6N@diego> In-Reply-To: <20211011081820.1135261-2-anup.patel@wdc.com> References: <20211011081820.1135261-1-anup.patel@wdc.com> <20211011081820.1135261-2-anup.patel@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Anup, Am Montag, 11. Oktober 2021, 10:18:13 CEST schrieb Anup Patel: > We force select CPU_PM and provide asm/cpuidle.h so that we can > use CPU IDLE drivers for Linux RISC-V kernel. > > Signed-off-by: Anup Patel > --- > arch/riscv/Kconfig | 7 +++++++ > arch/riscv/configs/defconfig | 1 + > arch/riscv/configs/rv32_defconfig | 1 + > arch/riscv/include/asm/cpuidle.h | 24 ++++++++++++++++++++++++ > arch/riscv/kernel/process.c | 3 ++- > 5 files changed, 35 insertions(+), 1 deletion(-) > create mode 100644 arch/riscv/include/asm/cpuidle.h > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 8de2afb460f7..d02f1f5a2431 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -46,6 +46,7 @@ config RISCV > select CLONE_BACKWARDS > select CLINT_TIMER if !MMU > select COMMON_CLK > + select CPU_PM if CPU_IDLE > select EDAC_SUPPORT > select GENERIC_ARCH_TOPOLOGY if SMP > select GENERIC_ATOMIC64 if !64BIT > @@ -564,5 +565,11 @@ source "kernel/power/Kconfig" > > endmenu > > +menu "CPU Power Management" > + > +source "drivers/cpuidle/Kconfig" > + > +endmenu > + > source "arch/riscv/kvm/Kconfig" > source "drivers/firmware/Kconfig" > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > index be21f54e9b91..39b4c32e7997 100644 > --- a/arch/riscv/configs/defconfig > +++ b/arch/riscv/configs/defconfig > @@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y > CONFIG_SOC_VIRT=y > CONFIG_SMP=y > CONFIG_HOTPLUG_CPU=y > +CONFIG_CPU_IDLE=y > CONFIG_VIRTUALIZATION=y > CONFIG_KVM=y > CONFIG_JUMP_LABEL=y This doesn't apply. In the history of your tree that you referenced in the cover-letter I found "RISC-V: Enable KVM for RV64 and RV32" with that nice "DO NOT UPSTREAM !!!!!" message in caps in it ;-) This of course makes this not apply on the main riscv tree. So you might want to base your series on top of a clean "for-next" branch of Palmer's tree instead of collecting other stuff below it. Same for rv32_defconfig below. Heiko > diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig > index ad01f50c98f1..fed827c82a9e 100644 > --- a/arch/riscv/configs/rv32_defconfig > +++ b/arch/riscv/configs/rv32_defconfig > @@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y > CONFIG_ARCH_RV32I=y > CONFIG_SMP=y > CONFIG_HOTPLUG_CPU=y > +CONFIG_CPU_IDLE=y > CONFIG_VIRTUALIZATION=y > CONFIG_KVM=y > CONFIG_JUMP_LABEL=y > diff --git a/arch/riscv/include/asm/cpuidle.h b/arch/riscv/include/asm/cpuidle.h > new file mode 100644 > index 000000000000..71fdc607d4bc > --- /dev/null > +++ b/arch/riscv/include/asm/cpuidle.h > @@ -0,0 +1,24 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2021 Allwinner Ltd > + * Copyright (C) 2021 Western Digital Corporation or its affiliates. > + */ > + > +#ifndef _ASM_RISCV_CPUIDLE_H > +#define _ASM_RISCV_CPUIDLE_H > + > +#include > +#include > + > +static inline void cpu_do_idle(void) > +{ > + /* > + * Add mb() here to ensure that all > + * IO/MEM accesses are completed prior > + * to entering WFI. > + */ > + mb(); > + wait_for_interrupt(); > +} > + > +#endif > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c > index 03ac3aa611f5..504b496787aa 100644 > --- a/arch/riscv/kernel/process.c > +++ b/arch/riscv/kernel/process.c > @@ -23,6 +23,7 @@ > #include > #include > #include > +#include > > register unsigned long gp_in_global __asm__("gp"); > > @@ -37,7 +38,7 @@ extern asmlinkage void ret_from_kernel_thread(void); > > void arch_cpu_idle(void) > { > - wait_for_interrupt(); > + cpu_do_idle(); > raw_local_irq_enable(); > } > >