Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp2232034pxb; Tue, 12 Oct 2021 02:08:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyomj0erTKOFcl6VUrL82Zp2Fy0/7WhouQFpIKOY1E9o6jqMQBSBzcNrn4eXi8en8Kg0E2E X-Received: by 2002:a05:6402:10da:: with SMTP id p26mr5804322edu.283.1634029715572; Tue, 12 Oct 2021 02:08:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634029715; cv=none; d=google.com; s=arc-20160816; b=gfTy4ausFTgGA0jLhxwnkx5jsEOdbqkAN5awBL/j11q/74Do6R0ia5GmgZXQBdMB+Y 9IE9FelqsVrCd3V2+x63pDLTy/U1LWjengy+MFybugMKRkhGN8EdppwnAKcSIk/BWkH4 eeyRC4RWydzy5oEoDjjVETUi8tWVTOlrCZgKQnJd1pN8FuO9OUWYT6VfNmUr0ZpZs369 ZiE7z1ueLsBmiKHfDTyzEikP8FbxnKeLRA8uFBEYmkT06iRLbnfq/zloOM/NHk4q3AMD YGAtAAAciRwZF95gIVzxNVa4Apb9rPlJ04ylAZj4/Xh1QVFFY/sdZ9P5v1NTMgk0FBsA BIfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=PGigZujhJi6FSvxhhoyiNTCqpHr/NCNZkfMybyVZKEQ=; b=zYnbRpp9jGVcrezsFjOA9uge4DGfLfV36GnstFXD7twOrZqS9jqAetoTPL7qJ7lHPg F41nf/9Vl45MJhUuQMX71Bdpubn2FydxntAy45yEfhrL+zLFBevs9LxU/DVuXZH5uQEG X9n3S7fe3N8ePu+9NaFjnujpEMiAVJ4iglHLo/IzDa1sBP7Qkd04U9Xsqo2+dh0WYXjZ MHVYLoacojjCThRwiZ65aar5dLyzlUkgd47mkPeCkVZQ2EGWqiUWGHXlcKdtubulACQr JRjoGLhWtNBhUx9EcHFYSlsbwQkP3XE+X99OfUh7tUYGUbWSyn3VKo4TSGuaDZZd/CZJ FKfw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z18si23616456edb.28.2021.10.12.02.08.12; Tue, 12 Oct 2021 02:08:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235581AbhJLJIQ (ORCPT + 99 others); Tue, 12 Oct 2021 05:08:16 -0400 Received: from inva020.nxp.com ([92.121.34.13]:45510 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235490AbhJLJIL (ORCPT ); Tue, 12 Oct 2021 05:08:11 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id AFE061A1D25; Tue, 12 Oct 2021 11:06:06 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 75BD11A1D2C; Tue, 12 Oct 2021 11:06:06 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id BD24E183AD0B; Tue, 12 Oct 2021 17:06:04 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, tharvey@gateworks.com, kishon@ti.com, vkoul@kernel.org, robh@kernel.org, galak@kernel.crashing.org, shawnguo@kernel.org Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Richard Zhu Subject: [PATCH v3 1/9] dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy Date: Tue, 12 Oct 2021 16:41:10 +0800 Message-Id: <1634028078-2387-2-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1634028078-2387-1-git-send-email-hongxing.zhu@nxp.com> References: <1634028078-2387-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add binding for reference clock PAD modes of the i.MX8 PCIe PHY. Signed-off-by: Richard Zhu --- include/dt-bindings/phy/phy-imx8-pcie.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 include/dt-bindings/phy/phy-imx8-pcie.h diff --git a/include/dt-bindings/phy/phy-imx8-pcie.h b/include/dt-bindings/phy/phy-imx8-pcie.h new file mode 100644 index 000000000000..2bc7f1b31c6b --- /dev/null +++ b/include/dt-bindings/phy/phy-imx8-pcie.h @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * This header provides constants for i.MX8 PCIe. + */ + +#ifndef _DT_BINDINGS_IMX8_PCIE_H +#define _DT_BINDINGS_IMX8_PCIE_H + +/* Reference clock PAD mode */ +#define IMX8_PCIE_REFCLK_PAD_UNUSED 0 +#define IMX8_PCIE_REFCLK_PAD_INPUT 1 +#define IMX8_PCIE_REFCLK_PAD_OUTPUT 2 + +#endif /* _DT_BINDINGS_IMX8_PCIE_H */ -- 2.25.1