Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp2232942pxb; Tue, 12 Oct 2021 02:10:09 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzpS6Lq0fMaQTab15PHx3J4HZKX0mpA3oz0p+LX07oR5WvIILhwfUsPbjxHLAKGN3XoJgXl X-Received: by 2002:a17:907:764e:: with SMTP id kj14mr29783460ejc.349.1634029809022; Tue, 12 Oct 2021 02:10:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634029809; cv=none; d=google.com; s=arc-20160816; b=TPBLvghtXyQQq8LHVmTXwcM3vW1lqfZU+DJt832FJB+tN6OHIfmQwCUTxLyShAUZqm E4KhE8ATwCCOKTK7DEmLZIa48EusO4iHCX61iBqm0f6+Bn0S8sI5/WNwD7/CYUdFyVvP QnAFpMv5r0HQBW4ByrDYC7Dg0Dob3ad7WWl0zOHmTWV/GJI0Z6KcjuGYXHXOWoG3GHtt Cz2Yrjd4A7oBFbw5ZV+2p/PfuN/QBiLSDg1RpyML0Wd0h2nlYI1T1tdSsmMi6H8LFUJr /ffRogxvLd5Sbzj4IqiPBwVO8TNsObMVEqeyoKe5T2/O5ZQaNbSdONYt7ZojaHojXunF yTeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=N4/tu7Zr5E0s0wnKszVhIzW4uwn3IjD+sIHhnJ3C1oc=; b=A7BywAEMOYAjDwHLMN+C2X8mjhhytZwezNe0PyQ9WUWnDOiI/M3FOQ4fYuDY1J6cHd iHYrAhtV6MF9GMbF37nDOeDmEJTWpNKntyQEb3SB6S+Fxz37Kr0BYzTaUrhE+i2tP1ya TOo2w1GXvz+uS7/psY35CJolZjgeic6rXAEC4e0orXGGrwiXHvjE3JCmjOZ5EZQLs17V ZuYHwX4bOm/4HOfKumFjc7jk+D8uM23PIfTKhEkxqtW2YC4qhfzjj8HSfeO4cn8EyHD3 Yun/lmT872uZo4SECW5FcjedPG37KzrOkPXhqyXGZE1Nchh+beLwfTtS9FhBobKjNerD bxiw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y3si14434096ejl.39.2021.10.12.02.09.45; Tue, 12 Oct 2021 02:10:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235805AbhJLJI3 (ORCPT + 99 others); Tue, 12 Oct 2021 05:08:29 -0400 Received: from inva020.nxp.com ([92.121.34.13]:45680 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235532AbhJLJIO (ORCPT ); Tue, 12 Oct 2021 05:08:14 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id BD20A1A1D21; Tue, 12 Oct 2021 11:06:12 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 8E8CE1A2486; Tue, 12 Oct 2021 11:06:12 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id D6637183AD0B; Tue, 12 Oct 2021 17:06:10 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, tharvey@gateworks.com, kishon@ti.com, vkoul@kernel.org, robh@kernel.org, galak@kernel.crashing.org, shawnguo@kernel.org Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Richard Zhu Subject: [PATCH v3 6/9] dt-bindings: imx6q-pcie: Add PHY phandles and name properties Date: Tue, 12 Oct 2021 16:41:15 +0800 Message-Id: <1634028078-2387-7-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1634028078-2387-1-git-send-email-hongxing.zhu@nxp.com> References: <1634028078-2387-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties in the binding document. Signed-off-by: Richard Zhu --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 2911e565b260..99d9863a69cd 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -128,6 +128,12 @@ properties: enum: [1, 2, 3, 4] default: 1 + phys: + description: Phandle of the Generic PHY to the PCIe PHY. + + phy-names: + const: pcie-phy + reset-gpio: description: Should specify the GPIO for controlling the PCI bus device reset signal. It's not polarity aware and defaults to active-low reset -- 2.25.1