Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp3902633pxb; Wed, 13 Oct 2021 15:47:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzDSgrvRmuZi8r0vvLGFe8hOGzLKu07u/V8k525zoEMWNYmZ+m/1FPF2DcRTTq0PrPbuMzC X-Received: by 2002:a17:906:a94b:: with SMTP id hh11mr2403683ejb.85.1634165251056; Wed, 13 Oct 2021 15:47:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634165251; cv=none; d=google.com; s=arc-20160816; b=UFq/oCvtmHgLe1a1C4MXjnGPUWTa+Bzx5+GGrICXDo2okuasMVqU/eRuMvuEEqFosE souM3GJqNlyRhFZ64Yp2bu6lYdOD5JeNMUh1sf5bVTRVBH/m68k2NB4nomRCCQZ7gmRg jgWg5TRQ8/W9Ey2YaKZFiriGJ7ddNNw9k1eF88UWTG143fVecJIIp7X9V6a8Draig7UL /zcK+TMC8howudXniRWVR5CBQOhKIqrt2DQN/ZwgjHwjP/37ksvTrO5bRb5dXJclkokH Jxmto9PM/R5Vgd+BYRf81yVm3/9c5Pf3fvlA6JIHvtAaynCQoLnpa205+5T9j9kHO1MF KrdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=hqJyLqLAip2AZ3RkV9mVIdZgkoZC/02Bzt/lONARpi8=; b=rHZesxuROOlO07m7Mlzjs98W01Pnu6NCHEQzNg2UD+0ez932i9oZK1JFS9QM9Qfumx C9X6O6JQr7nAzT/Eaxqfpz67ICm4HamjyRRgNxxrpXlxteNicCeOSkGDyoxQZ1dIaYH4 6HpEWuazGQIWo07zQh7NKznHzOQ38JrjEnmcgr9c4TwTO9RP3JfkvqtfAdZ35yHtlx2T RBt0xFSaT23oTOvvqeZOjtF76k7FOjqerSaEPueuSSrQMN7y51aKoZ9MeGWGqsQLKGeU 9hML2O48ZJNj2LOfRD1NFk8miBFGMc4gwvboHq5p3+ncXqiFBqUdJTtgRrAwV9mckL92 eiIA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i11si1453164edb.41.2021.10.13.15.47.07; Wed, 13 Oct 2021 15:47:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230337AbhJMWr3 (ORCPT + 99 others); Wed, 13 Oct 2021 18:47:29 -0400 Received: from mga05.intel.com ([192.55.52.43]:57284 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230032AbhJMWr3 (ORCPT ); Wed, 13 Oct 2021 18:47:29 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10136"; a="313756570" X-IronPort-AV: E=Sophos;i="5.85,371,1624345200"; d="scan'208";a="313756570" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2021 15:45:25 -0700 X-IronPort-AV: E=Sophos;i="5.85,371,1624345200"; d="scan'208";a="717515064" Received: from sjchris1-mobl.amr.corp.intel.com (HELO intel.com) ([10.252.132.156]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2021 15:45:24 -0700 Date: Wed, 13 Oct 2021 15:45:23 -0700 From: Ben Widawsky To: Dan Williams Cc: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, hch@lst.de Subject: Re: [PATCH v3 07/10] cxl/pci: Split cxl_pci_setup_regs() Message-ID: <20211013224523.rxyt2mg75ebxismi@intel.com> References: <163379783658.692348.16064992154261275220.stgit@dwillia2-desk3.amr.corp.intel.com> <163379787433.692348.2451270397309803556.stgit@dwillia2-desk3.amr.corp.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <163379787433.692348.2451270397309803556.stgit@dwillia2-desk3.amr.corp.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21-10-09 09:44:34, Dan Williams wrote: > From: Ben Widawsky > > In preparation for moving parts of register mapping to cxl_core, split > cxl_pci_setup_regs() into a helper that finds register blocks, > (cxl_find_regblock()), and a generic wrapper that probes the precise > register sets within a block (cxl_setup_regs()). > > Move the actual mapping (cxl_map_regs()) of the only register-set that > cxl_pci cares about (memory device registers) up a level from the former > cxl_pci_setup_regs() into cxl_pci_probe(). > > With this change the unused component registers are no longer mapped, > but the helpers are primed to move into the core. > > Signed-off-by: Ben Widawsky > [djbw: rebase on the cxl_register_map refactor] > [djbw: drop cxl_map_regs() for component registers] > Signed-off-by: Dan Williams [snip] Did you mean to also drop the component register handling in cxl_probe_regs() and cxl_map_regs()?