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From:   Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
To:     Rob Herring <robh+dt@kernel.org>, nobuhiro1.iwamatsu@toshiba.co.jp
Cc:     punit1.agrawal@toshiba.co.jp, yuji2.ishikawa@toshiba.co.jp,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org
Subject: [PATCH 3/3] arm64: dts: visconti: Add DTS for the VisROBO board
Date:   Thu, 14 Oct 2021 18:27:03 +0900
Message-Id: <20211014092703.15251-4-yuji2.ishikawa@toshiba.co.jp>
In-Reply-To: <20211014092703.15251-1-yuji2.ishikawa@toshiba.co.jp>
References: <20211014092703.15251-1-yuji2.ishikawa@toshiba.co.jp>
Precedence: bulk

This board consists of two boards:
the SoM board (VRC SoM) with the SoC on board, and the board for I/O (VRB).

The functions of each board supported by this update are as follows:
  - VRC SoM
    - WDT
    - GPIO
    - SDCard (SPI-MMC mode)
    - I2C x1
  - VRB board
    - VRC SoM
    - UART x2
    - Ethernet phy

Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
---
 arch/arm64/boot/dts/toshiba/Makefile          |  1 +
 .../boot/dts/toshiba/tmpv7708-visrobo-vrb.dts | 61 +++++++++++++++++++
 .../dts/toshiba/tmpv7708-visrobo-vrc.dtsi     | 44 +++++++++++++
 3 files changed, 106 insertions(+)
 create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts
 create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi

diff --git a/arch/arm64/boot/dts/toshiba/Makefile b/arch/arm64/boot/dts/toshiba/Makefile
index 8cd460d5b68e..7ccb4664bb37 100644
--- a/arch/arm64/boot/dts/toshiba/Makefile
+++ b/arch/arm64/boot/dts/toshiba/Makefile
@@ -1,2 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 dtb-$(CONFIG_ARCH_VISCONTI) += tmpv7708-rm-mbrc.dtb
+dtb-$(CONFIG_ARCH_VISCONTI) += tmpv7708-visrobo-vrb.dtb
diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts
new file mode 100644
index 000000000000..d0817463706e
--- /dev/null
+++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree File for TMPV7708 VisROBO VRB board
+ *
+ * (C) Copyright 2020, 2021, Toshiba Corporation.
+ * (C) Copyright 2020, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
+ */
+
+/dts-v1/;
+
+#include "tmpv7708-visrobo-vrc.dtsi"
+
+/ {
+	model = "Toshiba TMPV7708 VisROBO (VRB) board";
+	compatible = "toshiba,tmpv7708-visrobo-vrb", "toshiba,tmpv7708";
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	/* 768MB memory */
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x0 0x80000000 0x0 0x30000000>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+	clocks = <&uart_clk>;
+	clock-names = "apb_pclk";
+};
+
+&uart1 {
+	status = "okay";
+	clocks = <&uart_clk>;
+	clock-names = "apb_pclk";
+};
+
+&piether {
+	status = "okay";
+	phy-handle = <&phy0>;
+	phy-mode = "rgmii-id";
+	clocks = <&clk300mhz>, <&clk125mhz>;
+	clock-names = "stmmaceth", "phy_ref_clk";
+
+	mdio0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+		phy0: ethernet-phy@1 {
+			device_type = "ethernet-phy";
+			reg = <0x1>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi
new file mode 100644
index 000000000000..f0a93db6dde6
--- /dev/null
+++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree File for TMPV7708 VisROBO VRC SoM
+ *
+ * (C) Copyright 2020, 2021, Toshiba Corporation.
+ * (C) Copyright 2020, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
+ */
+
+/dts-v1/;
+
+#include "tmpv7708.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+&wdt {
+	status = "okay";
+	clocks = <&wdt_clk>;
+};
+
+&gpio {
+	status = "okay";
+};
+
+&spi0_pins {
+	groups = "spi0_grp", "spi0_cs0_grp";
+};
+
+&spi0 {
+	status = "okay";
+	clocks = <&clk300mhz>, <&clk150mhz>;
+	clock-names = "sspclk", "apb_pclk";
+
+	mmc-slot@0 {
+		compatible = "mmc-spi-slot";
+		reg = <0>;
+		gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		voltage-ranges = <3200 3400>;
+		spi-max-frequency = <12000000>;
+	};
+};
+
+&i2c0 {
+	status = "okay";
+	clocks = <&clk150mhz>;
+};
-- 
2.17.1