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[23.128.96.18]) by mx.google.com with ESMTP id bm8si2960478edb.417.2021.10.14.04.11.54; Thu, 14 Oct 2021 04:12:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JwlNlmC8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230379AbhJNLKp (ORCPT + 99 others); Thu, 14 Oct 2021 07:10:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50192 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230378AbhJNLKn (ORCPT ); Thu, 14 Oct 2021 07:10:43 -0400 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7084C061753 for ; Thu, 14 Oct 2021 04:08:38 -0700 (PDT) Received: by mail-lf1-x12b.google.com with SMTP id t9so25084815lfd.1 for ; Thu, 14 Oct 2021 04:08:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=k2530KBw5sIa2liX0bHYNkuPyPL4C8JnDHSe5IbAiNA=; b=JwlNlmC84haSnTpwQ4RIB0on3sSS4sEJxPcGpt+W9YaCwF5Qy390fnT4vlujDXHgdY rEBclA/tnvug/HMoy0mPnRyeYqfbpOkldGE33gpJg029ojuTOC2WO/NcZI9AyGVJoMVq wjHjsr3q0DhWH+DlQXIcdIfYrD9FmCtj3zMBPyoyNuXDYbC00xFxN3Usye0Iv48VP4uq EqP5iza3B1WDzn4ws9WlTpAJZdnmEExbwedoEXgVfz3iNVxJSjU1fwBxfm7Wjt08uZcY gt3BEPpsFAtWSJL5GE0/wmyix2338kCvCaEqUMxtIW6zi+zq9xAO7rN5JsLS6KyDfTkB yUfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=k2530KBw5sIa2liX0bHYNkuPyPL4C8JnDHSe5IbAiNA=; b=7G4zSzMYKXD5dntscRnTNHcHoN9eRPQPDLSgvBxvg5sHNCYc6za/RJIdrIf8UCSomR HkBNwTTPygP9wnD58kS8HIdma4VivEziDXjWBatND6GOOWM/fjisHAqfoWwTpSU1wKp5 RL6MRqYh2/EK3QpCb/GRuBouW/zKQ7NbQ7qSXBwP2mpGt8vKSaOSkhQ8CFM7joQkF1vG tCogYLmBkb8XcPx42sq7dXPFhnceORuwnstyzlgqNCUuFJItsMdHhde1sQKowxaSdHL9 gM7D8m0vbnfv/FS9wEJtvcJP9hcsXvAqRy8dfg9CSo+ZPRNm/rjN+pbu9+93ZIxVmky0 wUzQ== X-Gm-Message-State: AOAM530SGoMQwSZ0smRcqIqaNSkQvVCopnBcg7LcdVIIh88OALzGE+t8 vzKsUUynp5t0c/W0JDirdLod8CckR9nlTW/JdYnVbA== X-Received: by 2002:a19:5f4b:: with SMTP id a11mr4541619lfj.373.1634209717119; Thu, 14 Oct 2021 04:08:37 -0700 (PDT) MIME-Version: 1.0 References: <20211011165707.138157-1-marcan@marcan.st> <20211011165707.138157-5-marcan@marcan.st> <20211012032144.2ltlpat7orrsyr6k@vireshk-i7> <20211012055143.xmkbvhbnolspgjin@vireshk-i7> <20211012092603.lkmhhjoo5v67wh44@vireshk-i7> <049FC437-EC38-4FE5-891E-5E25960892CF@marcan.st> <20211012093252.hb6rlcpxv5bmk7n3@vireshk-i7> <0db8e994-ac2c-8fad-55d0-1b5a9e2e21f2@marcan.st> <20211014065636.lkv77aqbugp3qhif@vireshk-i7> <039b77f3-d10e-bd7a-a594-b951a98bdd45@marcan.st> <653603bc-56bb-7eaf-e6e8-3cc7f5c5a666@marcan.st> In-Reply-To: <653603bc-56bb-7eaf-e6e8-3cc7f5c5a666@marcan.st> From: Ulf Hansson Date: Thu, 14 Oct 2021 13:08:00 +0200 Message-ID: Subject: Re: [RFC PATCH 4/9] opp: core: Don't warn if required OPP device does not exist To: Hector Martin Cc: Viresh Kumar , Sibi Sankar , Saravana Kannan , Linux ARM , Alyssa Rosenzweig , Sven Peter , Marc Zyngier , Mark Kettenis , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Viresh Kumar , Nishanth Menon , Catalin Marinas , "Rafael J. Wysocki" , Kevin Hilman , linux-clk , DTML , Linux PM , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 14 Oct 2021 at 09:23, Hector Martin wrote: > > On 14/10/2021 16.03, Hector Martin wrote: > > On 14/10/2021 15.56, Viresh Kumar wrote: > >>> + /* > >>> + * Attach the CPU device to its genpd domain (if any), to allow OPP > >>> + * dependencies to be satisfied. > >>> + */ > >>> + ret = genpd_dev_pm_attach(cpu_dev); > >>> + if (ret <= 0) { > >>> + dev_err(cpu_dev, "Failed to attach CPU device to genpd\n"); > >>> + goto out; > >>> + } > >>> + > >> > >> Other platform do this from some other place I think. > >> > >> Ulf, where should this code be moved ? cpu-clk driver ? > >> > > > > I see one driver that does this is drivers/clk/qcom/apcs-sdx55.c (via > > dev_pm_domain_attach). Though it only does it for CPU#0; we need to do > > it for all CPUs. > > Looking into this further, I'm not sure I like the idea of doing this in > the clocks driver. There might be locking issues since it gets > instantiated twice and yet doesn't really itself know what subset of > CPUs it applies to. I agree. I suggest you look into using a genpd provider and hook up all CPU's devices to it. I think that is what Viresh also suggested earlier - and this makes most sense to me. As a reference you may have a look at some Qcom platforms that already use this: arch/arm64/boot/dts/qcom/qcs404.dtsi drivers/cpufreq/qcom-cpufreq-nvmem.c: To hook up CPU devices to their PM domains (genpds) - it calls dev_pm_opp_attach_genpd(), which is a kind of wrapper for dev_pm_domain_attach_by_name(). drivers/soc/qcom/cpr.c Registers the genpd provider that is capable of dealing with performance states/OPPs for CPUs. > > There's another driver that does this: > drivers/cpuidle/cpuidle-psci-domain.c. That one specifically looks for a > power domain called "psci". Perhaps it would make sense to make this > generic in cpufreq-dt as per my prior patch, but explicitly request a > "cpufreq" domain? That way only devicetrees that opt in to having this > handled by cpufreq by naming it that way would get this behavior. That sounds like an idea that is worth exploring. In this way, the only thing that needs to be implemented for new cases would be the genpd provider driver. BTW, as you will figure out by looking at the above references, for the qcom case we are using "cpr" as the domain name for cpufreq. Of course, that doesn't mean we can use "cpufreq" (or whatever name that makes sense) going forward for new cases. > > -- > Hector Martin (marcan@marcan.st) > Public Key: https://mrcn.st/pub Kind regards Uffe