Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp4578334pxb; Thu, 14 Oct 2021 07:58:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyVtxms38LFhi2kMgrJwYUzJc3Pt5hgx7Z8SR4upGKYxgbPb3k9BJbF+seXfAFcVIYL9XVV X-Received: by 2002:a50:9d85:: with SMTP id w5mr9304126ede.268.1634223525950; Thu, 14 Oct 2021 07:58:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634223525; cv=none; d=google.com; s=arc-20160816; b=svGDJO5PMfIFkH9lL0uM8tvUi2niIZ6axH1SjlU/YurlyjC5z+ehn14jFOoUghIbyT IyYPaMlqv2zc1iOCyJqSwThO9oIfn0K6mM4JmO6a74zii6R2QLDrvLi1VMJ8YccYFrEs MXniJEazkx9JmT/GfcOKXKEFb025ROHTfZcGA4ph1j71kka/XDZCHc5Z1ScVtfdAFyTA +NSFJZ9M1uc80zhaK5HC8XuorMNssocXdxQ3MfVqyFOqrN/w8oDXwGk/dczRwpiBQaok HwQy6jwXxqIfvpdhKwBXcHpq5KmwyqK7pCjIQQB/Eu8GoOr+6h5W/0AO6wo9KJtKHeSu Q+NQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=LofpnaVsJNgX5hl6OywOz4kAD7n/BC0HF7fiIj/LtQU=; b=HS0YuVltLtYvyKZcwpJ2pllKc40ifAhYJLcNgq0k4XOG5KzL3ji+uMjrqOB1CxnuAB d1SlyECyRkhYwq1+vaSsCca+ZvWvDYPbYBYk+/ofTnfMAA/YKb6UtfKG3TpT/cU4a9Tk DSNR08/Qv/8wJEFWog4xkSn0wEDR7sPChfwuIh+PN7fEFfP77zxq3p+iYo00SK3/f2eW zG8xh0XD1O5dtg49AiOoL9Jz5RINVBf72LdvVCYfp/FqonDIa2oKwApovsccRTsvHei4 tKJ5Mn9T12k10RdS6nTmdznTVzXDUJJGY9lFyHcqUaCx+ldUF5Y6j06BDRFqpn4Ru9R8 r28Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id cz1si3186763edb.419.2021.10.14.07.58.21; Thu, 14 Oct 2021 07:58:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230209AbhJNOgY (ORCPT + 99 others); Thu, 14 Oct 2021 10:36:24 -0400 Received: from mga14.intel.com ([192.55.52.115]:54348 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229994AbhJNOgY (ORCPT ); Thu, 14 Oct 2021 10:36:24 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10136"; a="227970933" X-IronPort-AV: E=Sophos;i="5.85,372,1624345200"; d="scan'208";a="227970933" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2021 07:34:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,372,1624345200"; d="scan'208";a="481278966" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by orsmga007.jf.intel.com with SMTP; 14 Oct 2021 07:34:15 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 14 Oct 2021 17:34:14 +0300 Date: Thu, 14 Oct 2021 17:34:14 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Borislav Petkov Cc: Ser Olmy , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, linux-kernel@vger.kernel.org Subject: Re: [regression] commit d298b03506d3 ("x86/fpu: Restore the masking out of reserved MXCSR bits") Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Patchwork-Hint: comment Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 14, 2021 at 04:27:07PM +0200, Borislav Petkov wrote: > On Thu, Oct 14, 2021 at 02:44:33PM +0300, Ville Syrj?l? wrote: > > I have a 32bit installation here that stopped working. Bisected it > > to commit d298b03506d3 ("x86/fpu: Restore the masking out of reserved > > MXCSR bits"). > > Lemme make sure I understand this correctly: this patch is bad and with > it reverted it works? Yes. > > Because before this patch, the restoring would be a more restrictive > than before and this patch reverts the code to the old behavior for > invalid MXCSR bits. > > > Tested the same disk on on both a 64bit capable Pentium D > > and a 32bit only Pentium 4 just to rule out the specific CPU. > > Busted on both. > > So that's a purely 32-bit installation and a 32-bit kernel and you've > booted it on two different machines? Yes. -- Ville Syrj?l? Intel