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[23.128.96.18]) by mx.google.com with ESMTP id y10si5123077pfi.116.2021.10.14.11.33.20; Thu, 14 Oct 2021 11:33:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=I0b88tEw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232784AbhJNPvp (ORCPT + 99 others); Thu, 14 Oct 2021 11:51:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232562AbhJNPvl (ORCPT ); Thu, 14 Oct 2021 11:51:41 -0400 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE3FFC061753 for ; Thu, 14 Oct 2021 08:49:36 -0700 (PDT) Received: by mail-pj1-x1030.google.com with SMTP id pf6-20020a17090b1d8600b0019fa884ab85so7248704pjb.5 for ; Thu, 14 Oct 2021 08:49:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Cdo2IY53QdZvWuodTSPVoJdmcB1S4P8LHhiW3c03rcM=; b=I0b88tEwj3JE/IAT78aAGXsEtfmxFvIcrfK8hf/r4ZsPEKHNmHEbPFPbqCwEqzBuW3 PjVg4l0AXCtsMVmoEmXx/yZRrrOw1dIuWC587lxM7TsR8k+4Y6PcSIdnBhKa88PZ4cjJ WpsG95BSQlduoBivA2ReWeTHqtfYUZ7AI27YPoNHpdmPOqzuuXKXMFt1O/QznNp3/yKL 9I5kd79gcS2Pcqr5FlZu2W/OROMIjaZisxj1nLTy/oKqVWB8Z8WeRJBya0cjh0ixLS2a zju58EM4ulcnZlTMEUWY4zOxobMXq2DtiwlCKRaHTCxg3zESsNZBxRt3IzyGHIrgPTzQ +CcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Cdo2IY53QdZvWuodTSPVoJdmcB1S4P8LHhiW3c03rcM=; b=3smrikprCIOlNbybBX23vMQiWRMF4a26yFveq5IjTAOqgKdyuDKQrjswXHjSj3ZLJA QCCOG2eJhU9Rm7bdtB2y9nrh0p1b3qBbbLtuqb6QG6Gvpukgd2KR6nPZP55efj+ZxEDS vq9deMZabUEof0gywe8RvivUi4DLQbYt+Z44cCHPFgdYDDW1JcZKV4dsX8dS6p3r/jAx FGpPqLL0R9MwS63JZBn+LGbwIMNNvSD60V9bEF+eJeQRLxUNyAeAZA3jRXO49m/5v3Q0 qj+VCPUVXg1IYx5gpzeD9XppXRxglC9SKMwTYtGbl/JtHxbJUudP7M4BHDLO3Sxvpx2j bbVw== X-Gm-Message-State: AOAM531TS6U8pJskZcqta1BYhyi4vTB6ATQ0/s5rGuqUigusQilA1GM+ icxJx57uhg5ZWv0sO20VQsHPQsJclCTx3UigQ6Aq1BNfe1A= X-Received: by 2002:a17:90a:b794:: with SMTP id m20mr7116811pjr.178.1634226576478; Thu, 14 Oct 2021 08:49:36 -0700 (PDT) MIME-Version: 1.0 References: <20210920053951.4093668-1-goldstein.w.n@gmail.com> In-Reply-To: From: Noah Goldstein Date: Thu, 14 Oct 2021 10:49:25 -0500 Message-ID: Subject: Re: [PATCH v1] x86/fpu: Remove opmask state from avx512_timestamp check To: Borislav Petkov Cc: tglx@linutronix.de, mingo@redhat.com, X86 ML , hpa@zytor.com, Andy Lutomirski , open list Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 14, 2021 at 3:28 AM Borislav Petkov wrote: > > On Wed, Oct 13, 2021 at 05:36:14PM -0500, Noah Goldstein wrote: > > Ping2 > > Why? This left me confused and annoyed for several hours because the avx512 usage information on my applications didn't make sense. Figured worth a patch for posterity. > > The original patch which added this abomination: > > 2f7726f95557 ("x86/fpu: Track AVX-512 usage of tasks") > > says already: > > the tracking mechanism is imprecise and can theoretically miss AVX-512 > usage during context switch. But it has been measured to be precise > enough to be useful under real-world workloads like tensorflow and > linpack. > > If higher precision is required, suggest user space tools to use the > PMU-based mechanisms in combination. This patch isn't about higher precision / false negatives. It's about false positives. > > and as you've noticed, the high 16 regs would cause a false positive > too. > > So what is the actual real-life use case for this? No big project. There is a case for avoiding the extended avx512 registers (reg16..31) for various reasons (context switches, code size, instruction limitations) that don't apply to mask registers. Irrelevant of the still existing flaws, it makes the output more accurate. Is there a cost to the change I am not seeing? If not it seems to be a tradeoff between more accurate vs less accurate. So why not take the former? > > -- > Regards/Gruss, > Boris. > > https://people.kernel.org/tglx/notes-about-netiquette