Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp4775423pxb; Thu, 14 Oct 2021 11:42:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyqCQJ5FZ64Rw4xsonz51W47nQC0gPiI5bBFEW88XPFTv/XYZqY5mabB+jXZKuTHa0ZTx0Y X-Received: by 2002:a17:906:c4c:: with SMTP id t12mr750332ejf.93.1634236935709; Thu, 14 Oct 2021 11:42:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634236935; cv=none; d=google.com; s=arc-20160816; b=SyYQ6I7NWOHzXUplARufQxqJ5qq5KW5M1PPJB6zA3Yiak6taXGDvI9oleERJeT2p/S hY1FnOeVVcXy3EDgQdUu5d+w8NmFUiF2uZZjrDuEcZeGWHkL7Dgu43sWz/M+1LLStdBt jVjava25EFcidR321uJomlgI+tvRcHHlBB4nnQHFkN6anMtmrFTs664ONLCdJwNv2Dvi gEn0+ZnNgKxP5VZNIYGRlzV/ws8W/gEWtsiK8uFbnpXZAyMow4O8hYF3LnQ8HrTl7wTK jUQrW1dRAM47jih9xpdrfE1bfxZVKBYpCy1j4sSbAH5Hqhz5GP98L2nIoLg88QbRp96u d0XQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:content-language :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject; bh=iZJiKWegyTFgVnehctL8eDH76/3y96U/qmUfyG2unNM=; b=UZtqrQ6PF++NMGFP+auaupiA/AaEBbL/bFZ3OIc3vbFurbQrRdZzXamy9drv19v1/A w+JFNHe51ckif+kpNvMkivUZGvc517soewSWHUoPGcRMxWRwTbBv2Qb2XyvKJamui7ug duRGnpz01R5gWLqZHbSnqhflhdeiEY3yBpAmW0VROJmwCzQLJUj4dzdc8y9pgvGiVWvj c/PBrHnhH3kQkSYJncA4TG3n+8A2W0k8ey7P1pHxK4A5jp3f2HnQ+wG/VOrGU2q7bVYe aRd98a1XtsQCThq6IJJ2zt3tRCFuBxWk/gG7it7FnSqRka6elIe4H97ieQQJ8kkbM49e R3Kg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=alibaba.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id gb1si6794401ejc.89.2021.10.14.11.41.50; Thu, 14 Oct 2021 11:42:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=alibaba.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231992AbhJNQGD (ORCPT + 99 others); Thu, 14 Oct 2021 12:06:03 -0400 Received: from out30-131.freemail.mail.aliyun.com ([115.124.30.131]:52428 "EHLO out30-131.freemail.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230359AbhJNQGC (ORCPT ); Thu, 14 Oct 2021 12:06:02 -0400 X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R191e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=e01e04357;MF=laijs@linux.alibaba.com;NM=1;PH=DS;RN=6;SR=0;TI=SMTPD_---0Urv6D08_1634227435; Received: from C02XQCBJJG5H.local(mailfrom:laijs@linux.alibaba.com fp:SMTPD_---0Urv6D08_1634227435) by smtp.aliyun-inc.com(127.0.0.1); Fri, 15 Oct 2021 00:03:56 +0800 Subject: Re: [PATCH 0/2] KVM: X86: Don't reset mmu context when changing PGE or PCID To: Lai Jiangshan , linux-kernel@vger.kernel.org Cc: Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , kvm@vger.kernel.org References: <20210919024246.89230-1-jiangshanlai@gmail.com> From: Lai Jiangshan Message-ID: <506c12c4-4a56-bcbf-a566-a3e75c0814aa@linux.alibaba.com> Date: Fri, 15 Oct 2021 00:03:55 +0800 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20210919024246.89230-1-jiangshanlai@gmail.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Ping On 2021/9/19 10:42, Lai Jiangshan wrote: > From: Lai Jiangshan > > This patchset uses kvm_vcpu_flush_tlb_guest() instead of kvm_mmu_reset_context() > when X86_CR4_PGE is changed or X86_CR4_PCIDE is changed 1->0. > > Neither X86_CR4_PGE nor X86_CR4_PCIDE participates in kvm_mmu_role, so > kvm_mmu_reset_context() is not required to be invoked. Only flushing tlb > is required as SDM says. > > The patchset has nothing to do with performance, because the overheads of > kvm_mmu_reset_context() and kvm_vcpu_flush_tlb_guest() are the same. And > even in the [near] future, kvm_vcpu_flush_tlb_guest() will be optimized, > the code is not in the hot path. > > This patchset makes the code more clear when to reset the mmu context. > And it makes KVM_MMU_CR4_ROLE_BITS consistent with kvm_mmu_role. > > Lai Jiangshan (2): > KVM: X86: Don't reset mmu context when X86_CR4_PCIDE 1->0 > KVM: X86: Don't reset mmu context when toggling X86_CR4_PGE > > arch/x86/kvm/mmu.h | 5 ++--- > arch/x86/kvm/x86.c | 7 +++++-- > 2 files changed, 7 insertions(+), 5 deletions(-) >