Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp45242pxb; Thu, 14 Oct 2021 23:47:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwSmfdnfdmoeQ9XFs4EiwmyEI0mEXIO2TJSQIbDLIdR0uWj34n8lnNydm7/6FkjueaysxB3 X-Received: by 2002:a17:90a:2902:: with SMTP id g2mr11615938pjd.161.1634280454652; Thu, 14 Oct 2021 23:47:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634280454; cv=none; d=google.com; s=arc-20160816; b=WXM3aMEbL7FrqbWNTidtIwpilRiwjCHtvaEHV73AM5uZ1HaW+MRcA9SgPCxs+eUWqI aI/2Zqu390klm2dskcP0Xw6wjQm4dGxwVQQ/HsJiMAsMgylSaPWC+Y52aRAUvsRxv+YO ZfBlTtN4URezX5j+Hgj8ozY2UcN1Ucy+Gu/HlIW4YTSNZkFx1bBus/N3P2nZ/m2uEM2J f6rxqQ6osJKzTHlEjUVjoUKG8vLoAxVkSy9mz+cmfPB2el6UAs4UX/0KSfakIZW3vM/E M67otpIMdwwUFximMpHTGlTP/H4gAQCT4PBxi+slVhbjocFVnNc0pcP98Syla2siwf9H KoHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=jDXGTzq/wQ2yo2okTvkIEfElBaeXNZKYCT6fD4Q5Md8=; b=GEOrNoIXzCI1f2J3JZU8JFu8Vj20gzPF+KklVv0GmsQMfT8LqGkFjzwIvZ4gRG/o1E WxsiXlglLlR/iBQBQf6+EXPGLb9FuOzROY6ZYbEhuPPQP9yfVe2JrWetGRPIeSa4U2Dz koBaLC6SmqOtTwoj0nPfyFYxELD1Kig6ww7vxfH557K/nZo3uZUhpnegV7SQxynDVLRg 15gD79nZKeYLlQevjqo2a2mw0uPRXAF45Jq/D8kUm2oS3ab2cQMCdI5pzNda9Ooet6OR n0zdKTQDwMQbbSbaJV69QOrY5YdUjV530XmOw4DnM639BLfiRo3vIHuCpCatE4csa4ML Y76w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y13si4278377pfb.187.2021.10.14.23.46.09; Thu, 14 Oct 2021 23:47:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234446AbhJNWeR (ORCPT + 99 others); Thu, 14 Oct 2021 18:34:17 -0400 Received: from foss.arm.com ([217.140.110.172]:32866 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234331AbhJNWeE (ORCPT ); Thu, 14 Oct 2021 18:34:04 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 732D51515; Thu, 14 Oct 2021 15:31:59 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F2D583F694; Thu, 14 Oct 2021 15:31:57 -0700 (PDT) From: Suzuki K Poulose To: will@kernel.org, mathieu.poirier@linaro.org Cc: catalin.marinas@arm.com, anshuman.khandual@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, maz@kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Suzuki K Poulose Subject: [PATCH v5 14/15] arm64: errata: Enable workaround for TRBE overwrite in FILL mode Date: Thu, 14 Oct 2021 23:31:24 +0100 Message-Id: <20211014223125.2605031-15-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20211014223125.2605031-1-suzuki.poulose@arm.com> References: <20211014223125.2605031-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org With the workaround enabled in TRBE, enable the config entries to be built without COMPILE_TEST Signed-off-by: Suzuki K Poulose --- arch/arm64/Kconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index f30029f4a9f9..f72fa44d6182 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -672,7 +672,6 @@ config ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE config ARM64_ERRATUM_2119858 bool "Cortex-A710: 2119858: workaround TRBE overwriting trace data in FILL mode" default y - depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in depends on CORESIGHT_TRBE select ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE help @@ -691,7 +690,6 @@ config ARM64_ERRATUM_2119858 config ARM64_ERRATUM_2139208 bool "Neoverse-N2: 2139208: workaround TRBE overwriting trace data in FILL mode" default y - depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in depends on CORESIGHT_TRBE select ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE help -- 2.25.4