Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
In-Reply-To: <20210930095838.28145-4-pali@kernel.org>
References: <20210930095838.28145-1-pali@kernel.org> <20210930095838.28145-4-pali@kernel.org>
Subject: Re: [PATCH v7 3/6] dt-bindings: mvebu-uart: document DT bindings for marvell,armada-3700-uart-clock
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     Andrew Lunn <andrew@lunn.ch>,
        Gregory Clement <gregory.clement@bootlin.com>,
        Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
        Vladimir Vid <vladimir.vid@sartura.hr>,
        Marek =?utf-8?q?Beh=C3=BAn?= <kabel@kernel.org>,
        linux-clk@vger.kernel.org, linux-serial@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        devicetree@vger.kernel.org
To:     Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Pali =?utf-8?q?Roh=C3=A1r?= <pali@kernel.org>,
        Rob Herring <robh+dt@kernel.org>
Date:   Thu, 14 Oct 2021 17:13:03 -0700
Message-ID: <163425678347.1688384.10695189000353676651@swboyd.mtv.corp.google.com>
User-Agent: alot/0.9.1
Precedence: bulk

Quoting Pali Roh=C3=A1r (2021-09-30 02:58:35)
> diff --git a/Documentation/devicetree/bindings/clock/marvell,armada-3700-=
uart-clock.yaml b/Documentation/devicetree/bindings/clock/marvell,armada-37=
00-uart-clock.yaml
> new file mode 100644
> index 000000000000..175f5c8f2bc5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-cl=
ock.yaml
> @@ -0,0 +1,59 @@
[..]
> +  '#clock-cells':
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    uartclk: clock-controller@12010 {

The uart device is at 0x12000 and the clock-controller is at 0x12010?
This looks like a node is being put into DT to represent a clk driver.
Why can't we register a clk from the uart device driver itself? I think
we talked about this a month or two ago but it still isn't clear to me.

> +      compatible =3D "marvell,armada-3700-uart-clock";
> +      reg =3D <0x12010 0x4>, <0x12210 0x4>;
> +      clocks =3D <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>;
> +      clock-names =3D "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal";
> +      #clock-cells =3D <1>;
> +    };
> --=20
> 2.20.1
>