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Fri, 15 Oct 2021 01:01:39 +0000 Received: from BN9PR11MB5433.namprd11.prod.outlook.com ([fe80::ddb7:fa7f:2cc:45df]) by BN9PR11MB5433.namprd11.prod.outlook.com ([fe80::ddb7:fa7f:2cc:45df%8]) with mapi id 15.20.4608.016; Fri, 15 Oct 2021 01:01:39 +0000 From: "Tian, Kevin" To: Jason Gunthorpe CC: Alex Williamson , "Liu, Yi L" , "hch@lst.de" , "jasowang@redhat.com" , "joro@8bytes.org" , "jean-philippe@linaro.org" , "parav@mellanox.com" , "lkml@metux.net" , "pbonzini@redhat.com" , "lushenming@huawei.com" , "eric.auger@redhat.com" , "corbet@lwn.net" , "Raj, Ashok" , "yi.l.liu@linux.intel.com" , "Tian, Jun J" , "Wu, Hao" , "Jiang, Dave" , "jacob.jun.pan@linux.intel.com" , "kwankhede@nvidia.com" , "robin.murphy@arm.com" , "kvm@vger.kernel.org" , "iommu@lists.linux-foundation.org" , "dwmw2@infradead.org" , "linux-kernel@vger.kernel.org" , "baolu.lu@linux.intel.com" , "david@gibson.dropbear.id.au" , "nicolinc@nvidia.com" Subject: RE: [RFC 10/20] iommu/iommufd: Add IOMMU_DEVICE_GET_INFO Thread-Topic: [RFC 10/20] iommu/iommufd: Add IOMMU_DEVICE_GET_INFO Thread-Index: AQHXrSGNbNtRgavabUSKJjvt8l12BauwlhaAgAAouwCAACufAIAAEL4QgACKr4CACtdfoIAA3DaAgBUX8GCAAHivgIAAl4Fg Date: Fri, 15 Oct 2021 01:01:38 +0000 Message-ID: References: <20210919063848.1476776-1-yi.l.liu@intel.com> <20210919063848.1476776-11-yi.l.liu@intel.com> <20210922152407.1bfa6ff7.alex.williamson@redhat.com> <20210922234954.GB964074@nvidia.com> <20210923114219.GG964074@nvidia.com> <20210930222355.GH964074@nvidia.com> <20211014154259.GT2744544@nvidia.com> In-Reply-To: <20211014154259.GT2744544@nvidia.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: nvidia.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5433.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 357c15c5-af7b-4da2-35ff-08d98f775813 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Oct 2021 01:01:38.9776 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 0ygnrAC+2SCpp6IBkTIESjidHBiH+7n3Amyiu5gq5SKmMpKI/0zMGscWQXlmPRDMHB57PTYN8rhjH3W96gKqWA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB1330 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > From: Jason Gunthorpe > Sent: Thursday, October 14, 2021 11:43 PM >=20 > > > > I think the key is whether other archs allow driver to decide DMA > > > > coherency and indirectly the underlying I/O page table format. > > > > If yes, then I don't see a reason why such decision should not be > > > > given to userspace for passthrough case. > > > > > > The choice all comes down to if the other arches have cache > > > maintenance instructions in the VM that *don't work* > > > > Looks vfio always sets IOMMU_CACHE on all platforms as long as > > iommu supports it (true on all platforms except intel iommu which > > is dedicated for GPU): > > > > vfio_iommu_type1_attach_group() > > { > > ... > > if (iommu_capable(bus, IOMMU_CAP_CACHE_COHERENCY)) > > domain->prot |=3D IOMMU_CACHE; > > ... > > } > > > > Should above be set according to whether a device is coherent? >=20 > For IOMMU_CACHE there are two questions related to the overloaded > meaning: >=20 > - Should VFIO ask the IOMMU to use non-coherent DMA (ARM meaning) > This depends on how the VFIO user expects to operate the DMA. > If the VFIO user can issue cache maintenance ops then IOMMU_CACHE > should be controlled by the user. I have no idea what platforms > support user space cache maintenance ops. But just like you said for intel meaning below, even if those ops are privileged a uAPI can be provided to support such usage if necessary. >=20 > - Should VFIO ask the IOMMU to suppress no-snoop (Intel meaning) > This depends if the VFIO user has access to wbinvd or not. >=20 > wbinvd is a privileged instruction so normally userspace will not > be able to access it. >=20 > Per Paolo recommendation there should be a uAPI someplace that > allows userspace to issue wbinvd - basically the suppress no-snoop > is also user controllable. >=20 > The two things are very similar and ultimately are a choice userspace > should be making. yes >=20 > From something like a qemu perspective things are more murkey - eg on > ARM qemu needs to co-ordinate with the guest. Whatever IOMMU_CACHE > mode VFIO is using must match the device coherent flag in the Linux > guest. I'm guessing all Linux guest VMs only use coherent DMA for all > devices today. I don't know if the cache maintaince ops are even > permitted in an ARM VM. >=20 I'll leave it to Jean to confirm. If only coherent DMA can be used in the guest on other platforms, suppose VFIO should not blindly set=20 IOMMU_CACHE and in concept it should deny assigning a non-coherent=20 device since no co-ordination with guest exists today. So the bottomline is that we'll keep this no-snoop thing Intel-specific.=20 For the basic skeleton we'll not support no-snoop thus the user=20 needs to set enforce-snoop flag when creating an IOAS like this RFC v1 does. Also need to introduce a new flag instead of abusing=20 IOMMU_CACHE in the kernel. For other platforms it may need a fix=20 to deny non-coherent device (based on above open) for now. Thanks Kevin