Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp178620pxb; Fri, 15 Oct 2021 03:22:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJws+v74aqtmQpNS1zxSETwKfvvM20vsiKUUhsQYYr9m3CucOmw56KE9HyCiEv+8f5BTy3vu X-Received: by 2002:a17:902:d4ca:b0:13f:36bb:9b20 with SMTP id o10-20020a170902d4ca00b0013f36bb9b20mr10150273plg.1.1634293334980; Fri, 15 Oct 2021 03:22:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634293334; cv=none; d=google.com; s=arc-20160816; b=oeWTrsA77E06EpHNS+lSpa7zWIHcJ2G+Q+kXm7ZZ4lLbdGRHt4/Ej92i0OnTuJ/v4I feet0kYLbzBRLwPsXMHxcSwguLWIRS5Yf9i41x6LuBkhrWF3OKKXnai8cszl3mkZqHgr 9VIN/WyyjFsKYonLbDv08jEs6oi26/qNspr6inYuZ1EonVaLQ/EEk7gmo06F1DcfpEpY L5g7rxh/uYYH+FMCuztgnyGzNkaCJiDJFoWYupTjQRZAwGZJdRlH+ltwpH3Yar6MRMl2 F8NNSzcg/ZG22/nx1zPgbRG3ByZ9ChP2QGwQnmzlUs9hEVQC95f65tMx6U7yoSJwxUu0 lF0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=TMwU8z8/LQBoAYmC9g7bu6xynGD7UrpwsBXR7iUeNYg=; b=RolLuU88Fa9JUnT/mJjV2PLtrJBtjkkrEI0avqCNB2oO3aj/MGAHGJc6+YZ+pz7D5k 2qHCHQsXZ72QpiAL/dZgErt2FY3Trhwf1ljBs1wuf3u3n/rNBfCZvSxTqw2sBobi4mgm dMf1DvFz7RHUk305qnWkrEl32cpYnvffqFITLlcycQ0kXmlIjm1NNejYprDAddrrZimA XcrFqGarwNh3cuSucqp0xxXYBVWjsjn83j47KMJ5PGxdno8pMnmLfTkSikMOO0zxCFKK PVPe5j3QO9QG29z2IkHBTZp2Iu5bB9RPAoT5sba7/xaKkMHsl3JzF+u9EENjTCE2C81Z k52w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=IZRHjyDD; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id e4si7533615plo.319.2021.10.15.03.22.01; Fri, 15 Oct 2021 03:22:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=IZRHjyDD; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234679AbhJOBUr (ORCPT + 99 others); Thu, 14 Oct 2021 21:20:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45194 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233864AbhJOBUC (ORCPT ); Thu, 14 Oct 2021 21:20:02 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 12AA8C061798; Thu, 14 Oct 2021 18:16:43 -0700 (PDT) Message-ID: <20211015011540.053515012@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634260601; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=TMwU8z8/LQBoAYmC9g7bu6xynGD7UrpwsBXR7iUeNYg=; b=IZRHjyDDLGucPzxkcSjlaLcrM0hXSfsMMZH6nGNrBoLiUO38oO4YxFVd7FgvZUWCUkSTkj H0sgl2wXuE5QcwyrGX6UKbKaZbH+25G9E3ixXHtlHR2DqWqT5/ZaPmNUPCw8FK6eWbZk3Z Cwkyoa7ZE7jpQH+bf8+JNsfZLAjluiSqHCc3p+p6rAyrdSNe4cnJsMgA4206EKw0syogoi TInB8C9b54x4BV86Bs82yKoJzkh5VxVjPJlTSSHci96ai9v76nZJBeeJIVTN23Xz55uuxY AFWvFA5fGEQXxj01CoQHZ7RzknjWsEW8MIhdkGyj4qw4i5lJyZOCDnW11725AA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634260601; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=TMwU8z8/LQBoAYmC9g7bu6xynGD7UrpwsBXR7iUeNYg=; b=l6rmTHz2EtlpCgyHhW5lMfDtFMBVI3KWBzlOBYX/EaQBbN/edXu4el9+hJ5DaVq8jLuk+z +At4PAhbsNd8ANDA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini , "Liu, Jing2" , Sean Christopherson , Xiaoyao Li Subject: [patch V2 30/30] x86/fpu: Provide a proper function for ex_handler_fprestore() References: <20211015011411.304289784@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Date: Fri, 15 Oct 2021 03:16:41 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To make upcoming changes for support of dynamically enabled features simpler, provide a proper function for the exception handler which removes exposure of FPU internals. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/fpu/api.h | 4 +--- arch/x86/kernel/fpu/core.c | 5 +++++ arch/x86/kernel/fpu/internal.h | 2 ++ arch/x86/mm/extable.c | 5 ++--- 4 files changed, 10 insertions(+), 6 deletions(-) --- diff --git a/arch/x86/include/asm/fpu/api.h b/arch/x86/include/asm/fpu/api.h index b68d8ce599e4..5ac5e4596b53 100644 --- a/arch/x86/include/asm/fpu/api.h +++ b/arch/x86/include/asm/fpu/api.h @@ -113,6 +113,7 @@ static inline void update_pasid(void) { } /* Trap handling */ extern int fpu__exception_code(struct fpu *fpu, int trap_nr); extern void fpu_sync_fpstate(struct fpu *fpu); +extern void fpu_reset_from_exception_fixup(void); /* Boot, hotplug and resume */ extern void fpu__init_cpu(void); @@ -129,9 +130,6 @@ static inline void fpstate_init_soft(struct swregs_state *soft) {} /* State tracking */ DECLARE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx); -/* fpstate */ -extern union fpregs_state init_fpstate; - /* fpstate-related functions which are exported to KVM */ extern void fpu_init_fpstate_user(struct fpu *fpu); diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c index c6d7a47b1b26..ac540a7d410e 100644 --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -155,6 +155,11 @@ void restore_fpregs_from_fpstate(union fpregs_state *fpstate, u64 mask) } } +void fpu_reset_from_exception_fixup(void) +{ + restore_fpregs_from_fpstate(&init_fpstate, xfeatures_mask_fpstate()); +} + #if IS_ENABLED(CONFIG_KVM) void fpu_swap_kvm_fpu(struct fpu *save, struct fpu *rstor, u64 restore_mask) { diff --git a/arch/x86/kernel/fpu/internal.h b/arch/x86/kernel/fpu/internal.h index bd7f813242dd..479f2db6e160 100644 --- a/arch/x86/kernel/fpu/internal.h +++ b/arch/x86/kernel/fpu/internal.h @@ -2,6 +2,8 @@ #ifndef __X86_KERNEL_FPU_INTERNAL_H #define __X86_KERNEL_FPU_INTERNAL_H +extern union fpregs_state init_fpstate; + /* CPU feature check wrappers */ static __always_inline __pure bool use_xsave(void) { diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c index 79c2e30d93ae..5cd2a88930a9 100644 --- a/arch/x86/mm/extable.c +++ b/arch/x86/mm/extable.c @@ -4,8 +4,7 @@ #include #include -#include -#include +#include #include #include #include @@ -48,7 +47,7 @@ static bool ex_handler_fprestore(const struct exception_table_entry *fixup, WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.", (void *)instruction_pointer(regs)); - restore_fpregs_from_fpstate(&init_fpstate, xfeatures_mask_fpstate()); + fpu_reset_from_exception_fixup(); return true; }