Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp952511pxb; Fri, 15 Oct 2021 21:12:28 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwSO3E4YgBK4SX3lEWjaFCWTDE58MoK7LeQD4C7IFdgPgoh3sTvWNHssxVpEP2Xj90G/6XI X-Received: by 2002:a05:6402:3554:: with SMTP id f20mr23662669edd.354.1634357547974; Fri, 15 Oct 2021 21:12:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634357547; cv=none; d=google.com; s=arc-20160816; b=U6EV5aTcXKoKUYcdxCQkgaC1j3wLjhEiRodReQ6oNCexCZy+G7b1MRZiD3GEXthRr3 xcari3yldj8YvTL65Mg40TdBdjqtx+QdOz0BLJhg9+cdWdPtBgwf93FYeLSeMf5GF7eA qO/JnR1JbdI/9kQKBmlwYJ+u3LarnKZ1Rj/6YLbsVcT6EV9bK0qVMTtyIQ3Bgc8zdw+t xoSOeX0YMV6z0EZPK9To0vq42Ao+ePLjqIMLrse924VguPt++CB5wr6gEFDxoHDS2KcB i8H21BVPu7LadVD7V/Cb0qJrpJZyjlYwHLnMAvW0O9YPDrtMMbD+BHFDP/m7vS6GuW4o UY1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :ironport-sdr:dkim-signature; bh=Aps3qi2sgP34Kca17wWaiNAGayG7Ms6d4xn8lKGY1YQ=; b=sFrASyU2v/uYY8Aa0pVWduEx5n5cKgwUI1pZHuuv1AtV5tMxisMSImMXUafJ/Z1ZB1 T/x+dhSI2FcEkpUrGUk9e2uC0Eu055O8JXTHvT4/vAy6cwcb+sWTsMDCiDS8zCy36xTn wpVo9M2ajnVrl1Lb+JNDvQzllyUkF7WNyrJOK4vdIJt9w8VqF8pLUJ9Byk2SawL4vAhR O8NmoNbUQKeFHvGxPiSrbMjmh4aTbX5r85jyBQ/z48pu1HFzaObVwgREn6DzrGju0LAe ZJTaIA/Qu8y8ga1FkXdl0kc6lFnj/q7zdBCFMZeHHGKpELyxCrI8BNdxlCFyv3ux+x6k hK9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@microchip.com header.s=mchp header.b="L/k3dWoG"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c12si16234075ede.394.2021.10.15.21.12.01; Fri, 15 Oct 2021 21:12:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@microchip.com header.s=mchp header.b="L/k3dWoG"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239405AbhJON1Z (ORCPT + 99 others); Fri, 15 Oct 2021 09:27:25 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:34023 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239400AbhJON1Y (ORCPT ); Fri, 15 Oct 2021 09:27:24 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1634304318; x=1665840318; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ztoqgqQaf0S6laz4BagIDcZq+SkBeBXQipu6xdcNRDM=; b=L/k3dWoGED277KhLJZOrvpUkbJJ4JCpk1q+i9OLvBiH3vCP78i0cL/Ii Lj6zzKJbpzCqudT8cs6eZ3wfimtKfzJtjTETivwyq1HW9FJyas0NSDTN7 wgapWwp6Xgivbl9XDgDI3hZG+FqMfcghswnNP+GMoypjuoBOWdKFwP37I Rt8xdIM/l2saYqVtgcUXajvYyZBVvOhgegQ7YpYZIV4bi3I2WBqqx1HFJ h1oeZAy/LdVU35lg/4lJpFRDM1UsxC8HwNRwykWumdX+IpHixFz7Y1VfW 6sz2A3Rw+Tqtvn4y+fp7sA8w0fprXEk2dmZko7gTPmSuawm4iihm9YsTa w==; IronPort-SDR: 6jy7qIJYIv4MHZN6f7DhDOJLfn8aniG64iZCZJ4S0Y9ZNI3L3MYyqZJ14RlvYit/y6HCIvnLqH TH7w7jKG+qEl626uB24XkkL89sqzX7JdxLNVqpfC3iSAybbkSqVy+wCGzME4Nftmsb71CNysVh YX4LAYbuwyG16fl3R4NxL0CN1XjTE01E9tphd0W5KZn5cS+1vWkW3MhPf7T89CoqitYek4s0t7 ReavjlwEvSd7YGbEyLIn+lMU/84sDGefrGt3wZwTdnTrUnwSoeJTE+31UuD/k6xNcnTP2CUzcS Qyt2vmMWTc0tSqHPNoiOj74/ X-IronPort-AV: E=Sophos;i="5.85,375,1624345200"; d="scan'208";a="73075277" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Oct 2021 06:25:17 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Fri, 15 Oct 2021 06:25:17 -0700 Received: from soft-dev3-1.microsemi.net (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Fri, 15 Oct 2021 06:25:15 -0700 From: Horatiu Vultur To: , , , , , , , , , CC: Horatiu Vultur Subject: [PATCH v4 2/2] pinctrl: microchip sgpio: use reset driver Date: Fri, 15 Oct 2021 15:25:26 +0200 Message-ID: <20211015132526.200816-3-horatiu.vultur@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211015132526.200816-1-horatiu.vultur@microchip.com> References: <20211015132526.200816-1-horatiu.vultur@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On lan966x platform when the switch gets reseted then also the sgpio gets reseted. The fix for this is to extend also the sgpio driver to call the reset driver which will be reseted only once by the first driver that is probed. Signed-off-by: Horatiu Vultur --- drivers/pinctrl/pinctrl-microchip-sgpio.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c index 072bccdea2a5..23f5a744edc4 100644 --- a/drivers/pinctrl/pinctrl-microchip-sgpio.c +++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c @@ -17,6 +17,7 @@ #include #include #include +#include #include "core.h" #include "pinconf.h" @@ -803,6 +804,7 @@ static int microchip_sgpio_probe(struct platform_device *pdev) int div_clock = 0, ret, port, i, nbanks; struct device *dev = &pdev->dev; struct fwnode_handle *fwnode; + struct reset_control *reset; struct sgpio_priv *priv; struct clk *clk; u32 val; @@ -813,6 +815,9 @@ static int microchip_sgpio_probe(struct platform_device *pdev) priv->dev = dev; + reset = devm_reset_control_get_optional_shared(&pdev->dev, NULL); + reset_control_reset(reset); + clk = devm_clk_get(dev, NULL); if (IS_ERR(clk)) return dev_err_probe(dev, PTR_ERR(clk), "Failed to get clock\n"); -- 2.33.0