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[209.91.167.254]) by smtp.gmail.com with ESMTPSA id i13sm4047978qtp.87.2021.10.16.08.46.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Oct 2021 08:46:02 -0700 (PDT) From: Trevor Woerner To: linux-kernel@vger.kernel.org Cc: Rob Herring , Heiko Stuebner , Johan Jonker , Chen-Yu Tsai , David Wu , Ezequiel Garcia , Cameron Nemo , Robin Murphy , Elaine Zhang , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support) Subject: [PATCH 1/2] arm64: dts: rk3328: add gpu opp table Date: Sat, 16 Oct 2021 11:45:44 -0400 Message-Id: <20211016154548.29555-1-twoerner@gmail.com> X-Mailer: git-send-email 2.30.0.rc0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add an operating-points table and cooling entry to the GPU on the RK3328 SoC to improve its performance. According to its datasheet[1] the maximum frequency of the Mali-450 MP2 GPU found on the RK3328 SoC is 500MHz. On my rock64 device, under x11, glmark2-es2 performance increased from around 60 to just over 100. Same device running glmark2-es2 under wayland/weston improved from just over 100 to just over 200. [1] https://rockchip.fr/RK3328%20datasheet%20V1.2.pdf Signed-off-by: Trevor Woerner --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 26 +++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 8c821acb21ff..5e1dcf71e414 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -532,7 +532,8 @@ map0 { cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; contribution = <4096>; }; }; @@ -617,6 +618,29 @@ gpu: gpu@ff300000 { clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; clock-names = "bus", "core"; resets = <&cru SRST_GPU_A>; + operating-points-v2 = <&gpu_opp_table>; + #cooling-cells = <2>; + }; + + gpu_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1100000>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <1100000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1100000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <1100000>; + }; }; h265e_mmu: iommu@ff330200 { -- 2.30.0.rc0