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[23.128.96.18]) by mx.google.com with ESMTP id me17si10192644pjb.116.2021.10.17.20.38.55; Sun, 17 Oct 2021 20:39:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SMPbkoRB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244798AbhJPWT5 (ORCPT + 98 others); Sat, 16 Oct 2021 18:19:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53300 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244698AbhJPWTK (ORCPT ); Sat, 16 Oct 2021 18:19:10 -0400 Received: from mail-ot1-x335.google.com (mail-ot1-x335.google.com [IPv6:2607:f8b0:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3DC52C06176A for ; Sat, 16 Oct 2021 15:17:02 -0700 (PDT) Received: by mail-ot1-x335.google.com with SMTP id x33-20020a9d37a4000000b0054733a85462so182077otb.10 for ; Sat, 16 Oct 2021 15:17:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=f3Y7Ha8qdHXB57ScuBGUf5G032rtC1aky5TYdKeHYlc=; b=SMPbkoRBB/lcOrzbs9uZ+F6Va/xvb4NkR7QxSekAe6cWEZj23J6RoSS072CbhPFDxP 9CNlSwRIyMQi/vCboyvGcqBGiC3bBwNUsau1uVcOYQODu1okGWl+pWWYUXDPJtR367St LfZFCS6zMV+JAtOdlsVr9sWK4ePwJuC6nSW+reiwChzB7qQvx+KTC32b51nG7qqpFSG2 19S5HtRqL9qAa0AYpXlHHAe8fggbFMimJWUSt2gMi8tgOd73+qv3q33/wcYAUCBmk5+7 tfy3NMASW2VeveqXztb3/eM5CkThQBn0jP4PJbY6IkRpe7zNfNdJIrFYyW9qaJI8vuQU whqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=f3Y7Ha8qdHXB57ScuBGUf5G032rtC1aky5TYdKeHYlc=; b=pixC1Y91tICiMd9XGBB5oh2WHXApUVdap6T3HRvs9wJsaFT7rmIcsgbiC/6KoRZElw 1Vd8urCugxxrJvU3bnRIifcfFuhPlrlYmWJSaf7L4lz8nPBMdkYTpzxPeecngM3obotf 3TpoGmz4bZoZcxh0oBOS728MoDIumYIz++i8D8CkwxDPaeH1BjclCsoA8rs2bMtCDW6e wsvUnJmBgLxq9q7hX43QwQk5UADBW88GGxv/Rtb78+7fHU7wgSlLOVmHz/oMWjxhfaHL z4hjGRAjaGClPl2XggARzOy02anG3o9TNVW4Jo2qHpMUPzDdrg3QmWYoRkF3/h4KNm3d hqwA== X-Gm-Message-State: AOAM532P1DP/x5om7HeNdFWozPfyLtow1CehAajdfR0MFj3LzGpaYQ6/ UljfmlVR+LrVYS/x91mu9Kzzpg== X-Received: by 2002:a9d:70c4:: with SMTP id w4mr2703584otj.170.1634422621620; Sat, 16 Oct 2021 15:17:01 -0700 (PDT) Received: from localhost.localdomain ([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id d15sm1747058oic.32.2021.10.16.15.17.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Oct 2021 15:17:01 -0700 (PDT) From: Bjorn Andersson To: Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Abhinav Kumar , Dmitry Baryshkov , Kalyan Thota , Kuogee Hsieh Cc: Rob Herring , Stephen Boyd , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 7/7] drm/msm/dp: Add sc8180x DP controllers Date: Sat, 16 Oct 2021 15:18:43 -0700 Message-Id: <20211016221843.2167329-8-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20211016221843.2167329-1-bjorn.andersson@linaro.org> References: <20211016221843.2167329-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The sc8180x has 2 DP and 1 eDP controllers, add support for these to the DP driver. Link: https://lore.kernel.org/linux-arm-msm/20210725042436.3967173-7-bjorn.andersson@linaro.org/ Signed-off-by: Bjorn Andersson --- Changes since v4: - Use the MSM_DP_CONTROLLER_n enums - const the msm_dp_desc array drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++--- drivers/gpu/drm/msm/dp/dp_display.c | 11 +++++++++++ 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 47d5d71eb5d3..0ac6a79e8af9 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -918,13 +918,13 @@ static const struct dpu_intf_cfg sc7280_intf[] = { }; static const struct dpu_intf_cfg sc8180x_intf[] = { - INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), + INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, MSM_DP_CONTROLLER_0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), - INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), - INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), + INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, MSM_DP_CONTROLLER_1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), + INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, MSM_DP_CONTROLLER_2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), }; /************************************************************* diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index d3c9d7273354..70dcd4e6d466 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -135,8 +135,19 @@ static const struct msm_dp_config sc7180_dp_cfg = { .num_descs = 1, }; +static const struct msm_dp_config sc8180x_dp_cfg = { + .descs = (const struct msm_dp_desc[]) { + [MSM_DP_CONTROLLER_0] = { .io_start = 0x0ae90000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, + [MSM_DP_CONTROLLER_1] = { .io_start = 0x0ae98000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, + [MSM_DP_CONTROLLER_2] = { .io_start = 0x0ae9a000, .connector_type = DRM_MODE_CONNECTOR_eDP }, + }, + .num_descs = 3, +}; + static const struct of_device_id dp_dt_match[] = { { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_cfg }, + { .compatible = "qcom,sc8180x-dp", .data = &sc8180x_dp_cfg }, + { .compatible = "qcom,sc8180x-edp", .data = &sc8180x_dp_cfg }, {} }; -- 2.29.2