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Message-ID: <fb4e2523-65f0-3353-9469-1015af328935@gmail.com>
Date:   Mon, 18 Oct 2021 00:48:26 +0300
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Subject: Re: [PATCH] clk: qcom: gcc-sm6115: Fix offset for
 hlos1_vote_turing_mmu_tbu0_gdsc
Content-Language: en-US
To:     Shawn Guo <shawn.guo@linaro.org>, Stephen Boyd <sboyd@kernel.org>
Cc:     Bjorn Andersson <bjorn.andersson@linaro.org>,
        linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org
References: <20210919022308.24046-1-shawn.guo@linaro.org>
From:   Iskren Chernev <iskren.chernev@gmail.com>
In-Reply-To: <20210919022308.24046-1-shawn.guo@linaro.org>
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On 9/19/21 05:23, Shawn Guo wrote:
> It looks that the offset 0x7d060 is a copy & paste from above
> hlos1_vote_turing_mmu_tbu1_gdsc.  Correct it to 0x7d07c as per
> downstream kernel.

You're right, 0x7d07c is the right offset, my bad.

> Fixes: cbe63bfdc54f ("clk: qcom: Add Global Clock controller (GCC) driver for SM6115")
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
>  drivers/clk/qcom/gcc-sm6115.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/qcom/gcc-sm6115.c b/drivers/clk/qcom/gcc-sm6115.c
> index bc09736ece76..68fe9f6f0d2f 100644
> --- a/drivers/clk/qcom/gcc-sm6115.c
> +++ b/drivers/clk/qcom/gcc-sm6115.c
> @@ -3242,7 +3242,7 @@ static struct gdsc hlos1_vote_turing_mmu_tbu1_gdsc = {
>  };
>  
>  static struct gdsc hlos1_vote_turing_mmu_tbu0_gdsc = {
> -	.gdscr = 0x7d060,
> +	.gdscr = 0x7d07c,
>  	.pd = {
>  		.name = "hlos1_vote_turing_mmu_tbu0",
>  	},
> 

Acked-by: Iskren Chernev <iskren.chernev@gmail.com>