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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id ay42sm3156043oib.22.2021.10.18.09.43.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Oct 2021 09:43:27 -0700 (PDT) Received: (nullmailer pid 2532419 invoked by uid 1000); Mon, 18 Oct 2021 16:43:26 -0000 Date: Mon, 18 Oct 2021 11:43:26 -0500 From: Rob Herring To: Sean Anderson Cc: linux-arm-kernel@lists.infradead.org, Thierry Reding , linux-kernel@vger.kernel.org, Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Alvaro Gamez , devicetree@vger.kernel.org, Lee Jones , michal.simek@xilinx.com, linux-pwm@vger.kernel.org Subject: Re: [PATCH v8 2/3] dt-bindings: pwm: Add Xilinx AXI Timer Message-ID: References: <20211015190025.409426-1-sean.anderson@seco.com> <20211015190025.409426-2-sean.anderson@seco.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211015190025.409426-2-sean.anderson@seco.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 15 Oct 2021 15:00:24 -0400, Sean Anderson wrote: > This adds a binding for the Xilinx LogiCORE IP AXI Timer. This device is a > "soft" block, so it has some parameters which would not be configurable in > most hardware. This binding is usually automatically generated by Xilinx's > tools, so the names and values of some properties should be kept as they > are, if possible. In addition, this binding is already in the kernel at > arch/microblaze/boot/dts/system.dts, and in user software such as QEMU. > > The existing driver uses the clock-frequency property, or alternatively the > /cpus/timebase-frequency property as its frequency input. Because these > properties are deprecated, they have not been included with this schema. > All new bindings should use the clocks/clock-names properties to specify > the parent clock. > > Because we need to init timer devices so early in boot, we determine if we > should use the PWM driver or the clocksource/clockevent driver by the > presence/absence, respectively, of #pwm-cells. Because both counters are > used by the PWM, there is no need for a separate property specifying which > counters are to be used for the PWM. > > Signed-off-by: Sean Anderson > --- > > Changes in v8: > - Set additionalProperties: false > > Changes in v7: > - Add #pwm-cells to properties > - Document why additionalProperties is true > > Changes in v6: > - Enumerate possible counter widths > - Fix incorrect schema id > > Changes in v5: > - Add example for timer binding > - Fix indentation lint > - Move schema into the timer directory > - Remove xlnx,axi-timer-2.0 compatible string > - Update commit message to reflect revisions > > Changes in v4: > - Make some properties optional for clocksource drivers > - Predicate PWM driver on the presence of #pwm-cells > - Remove references to generate polarity so this can get merged > > Changes in v3: > - Add an example with non-deprecated properties only. > - Add xlnx,pwm and xlnx,gen?-active-low properties. > - Make newer replacement properties mutually-exclusive with what they > replace > - Mark all boolean-as-int properties as deprecated > > Changes in v2: > - Use 32-bit addresses for example binding > > .../bindings/timer/xlnx,xps-timer.yaml | 92 +++++++++++++++++++ > 1 file changed, 92 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml > Reviewed-by: Rob Herring