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[23.128.96.18]) by mx.google.com with ESMTP id jg22si1153812ejc.602.2021.10.18.22.34.19; Mon, 18 Oct 2021 22:34:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b="dDZUF/q1"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234130AbhJSFcx (ORCPT + 99 others); Tue, 19 Oct 2021 01:32:53 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:45339 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233499AbhJSFcf (ORCPT ); Tue, 19 Oct 2021 01:32:35 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1634621423; x=1666157423; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=Pzdiylxn8WlhaTRw2uatOGb8nAOn5nsVXguZrdoB1S0=; b=dDZUF/q1MCRMjvmaOpKF2WDhCkwZ3yalMUQbsJmGRcfsZ/yKFFVX8zii NdKkZ1v7Y3FP5LFWdbUzuTtbnVJP186c3I77ZI7nXLN6NNiPv9oU2jWSW mrFWNH9CKBxyqETSnftGxyQh/UWNvb0hiRSJpce9lcpcqBdVbsWOArY4F k=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 18 Oct 2021 22:30:23 -0700 X-QCInternal: smtphost Received: from nalasex01c.na.qualcomm.com ([10.47.97.35]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2021 22:30:22 -0700 Received: from fenglinw-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.7; Mon, 18 Oct 2021 22:30:20 -0700 From: Fenglin Wu To: , , CC: , , , , Subject: [PATCH v2 10/10] spmi: pmic-arb: increase SPMI transaction timeout delay Date: Tue, 19 Oct 2021 13:29:21 +0800 Message-ID: <1634621361-17155-11-git-send-email-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1634621361-17155-1-git-send-email-quic_fenglinw@quicinc.com> References: <1634621361-17155-1-git-send-email-quic_fenglinw@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Collins Increase the SPMI transaction timeout delay from 100 us to 1000 us in order to account for the slower execution time found on some simulator targets. Signed-off-by: David Collins Signed-off-by: Fenglin Wu --- drivers/spmi/spmi-pmic-arb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c index d7bf8b6..43a2a4f 100644 --- a/drivers/spmi/spmi-pmic-arb.c +++ b/drivers/spmi/spmi-pmic-arb.c @@ -91,7 +91,7 @@ enum pmic_arb_channel { /* Maximum number of support PMIC peripherals */ #define PMIC_ARB_MAX_PERIPHS 512 -#define PMIC_ARB_TIMEOUT_US 100 +#define PMIC_ARB_TIMEOUT_US 1000 #define PMIC_ARB_MAX_TRANS_BYTES (8) #define PMIC_ARB_APID_MASK 0xFF -- 2.7.4