Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp1421478pxb; Wed, 20 Oct 2021 04:56:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzwluulVj5L73aCzjlqyWPEEddrUUGedntRcIaAjQkqxVyGtXbSQ9YdHZdxfepTYI+Z0N+b X-Received: by 2002:a05:6402:3547:: with SMTP id f7mr61876104edd.395.1634731010057; Wed, 20 Oct 2021 04:56:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634731010; cv=none; d=google.com; s=arc-20160816; b=jCHT7cskAgv7WC6+q7zCc1jBG5VnmPf4dxxva2849P1mz/ThIY/Cd+QauyoARHWFx1 BbEb0Fj6OOSbKKnkZT7vDy/hqfJ1gW7yJpOtdFhUD6hIMFMeePVXcjvIuJTHOkRYwMar 68bdbtSQlKKkJ/o7Z48paxUA+F23EQWjAobtkYt8o0PFRDtm8cdjWkecjGzUwEOPeQFC P5jHtunK/g1JsWe7Vy0qhZvq1hxfahIGauAY0bIB82B+kycEVa7qX5AIA+NOJy3Wmoee noZ9IvbrF9we/VkIO4eM9zEKfEU9XGUKv5BUFUFnbYyWJH1LbMWYPlBcdVVYmh6pkP6R xX/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=4WZXRNfKdsQq3JL8wpnCk5IrZuO1OgiS4HFYmoH9fxA=; b=TQmRNpfX9RXN5/0YhpPfaZjEYou/Les+JkPmhdbTY9rgG9D+St9HjrnwznLRLSQDDJ D1tM/si5H3K55qXYPgH6oijN5cDgokZ8d4LtsFoOsUdH7HQ3FVCzNuBzWKvUcvvnTJS4 tAsn4T37/Hjlml5FSkubZIM5rLTkdUXzBdlF0DdXigv1vrP4yxoW215pnBCYDMNQUq9N 6svZiRSr83G+UP4oXhz40WeZY61hnygHF6rPmBuWbDkgBe6M6Y4JeSx/+dSmMmcZTahD MxofmRSyqiLvwEKQyZ9h+BVHdSjGJfPu8SaUpC0GnGxKRMRb64E7O8Hm9U602EbwsLKN xAqw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id sh9si3210517ejc.389.2021.10.20.04.56.23; Wed, 20 Oct 2021 04:56:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230135AbhJTLyd (ORCPT + 99 others); Wed, 20 Oct 2021 07:54:33 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:50404 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229548AbhJTLyd (ORCPT ); Wed, 20 Oct 2021 07:54:33 -0400 X-UUID: 9f253c674058444c94556d94331d6c53-20211020 X-UUID: 9f253c674058444c94556d94331d6c53-20211020 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1567313119; Wed, 20 Oct 2021 19:52:15 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 20 Oct 2021 19:52:13 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 20 Oct 2021 19:52:13 +0800 From: YC Hung To: , , , CC: , , , , , , , , Subject: [PATCH 0/2] Add code to manage DSP clocks and provide dts-binding document Date: Wed, 20 Oct 2021 19:51:53 +0800 Message-ID: <20211020115155.9909-1-yc.hung@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: "yc.hung" This code is based on top of SOF topic/sof-dev branch and we want to have a review with ALSA and device Tree communities the it will be merged to SOF tree and then merged into ALSA tree. It provides two patches, one is for mt8195 dsp clocks related. Another is for mt8195 dsp dts binding decription. YC Hung (2): ASoC: SOF: mediatek: Add mt8195 dsp clock support dt-bindings: dsp: mediatek: Add mt8195 DSP binding support .../bindings/dsp/mtk,mt8195-dsp.yaml | 138 +++++++++++++++ sound/soc/sof/mediatek/mt8195/Makefile | 2 +- sound/soc/sof/mediatek/mt8195/mt8195-clk.c | 164 ++++++++++++++++++ sound/soc/sof/mediatek/mt8195/mt8195-clk.h | 29 ++++ sound/soc/sof/mediatek/mt8195/mt8195.c | 23 ++- 5 files changed, 353 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.c create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.h -- 2.18.0