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Miller" , Arnd Bergmann , Jonathan Corbet , "Michael S . Tsirkin" , Paolo Bonzini , David Hildenbrand , Andrea Arcangeli , Josh Poimboeuf Cc: Peter H Anvin , Dave Hansen , Tony Luck , Dan Williams , Andi Kleen , Kirill Shutemov , Sean Christopherson , Kuppuswamy Sathyanarayanan , x86@kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-alpha@vger.kernel.org, linux-mips@vger.kernel.org, linux-parisc@vger.kernel.org, sparclinux@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, virtualization@lists.linux-foundation.org References: <20211009003711.1390019-1-sathyanarayanan.kuppuswamy@linux.intel.com> <20211009003711.1390019-7-sathyanarayanan.kuppuswamy@linux.intel.com> <654455db-a605-5069-d652-fe822ae066b0@amd.com> <66acafb6-7659-7d76-0f52-d002cfae9cc8@linux.intel.com> From: Tom Lendacky Message-ID: <0b06e686-b0d8-9485-ae00-b23f805916d9@amd.com> Date: Wed, 20 Oct 2021 12:22:41 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 In-Reply-To: <66acafb6-7659-7d76-0f52-d002cfae9cc8@linux.intel.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?OWRNUUJDRlhmVXdDOVdSVmJvTXUyMjk2OWlucmxuN3c1b3Q3V2VTSGZWaWdE?= =?utf-8?B?VWhpNFlUYlg5UE14RVNheEJnSW4vVlhhRGQ1Vnkra0RKZjhtbS9LUSswMkll?= =?utf-8?B?VlNHall1UDR3cnJRN1RsL21ld2IyMUV1NFVtN0NJNlRjelMyZWZQUzFPTm9Q?= =?utf-8?B?STZiWHIxdndsTFUyaGRiaGJEMmVSM3JLQUI0QW11cVZ2RVMydzE0cjdyUU1i?= =?utf-8?B?NjZZNSsvM09rU3A1WGd2eE1KejYyZUM2TTlvcjVGZ24xZXRIS3BTQ0dEMFpZ?= =?utf-8?B?cVl6ZEJJREtTdTVtS01obWhwSTFFVEVHa1RYcEVFc3htV1VZLzVLMURoU0tV?= =?utf-8?B?Z0xSZVJSbzZTRmpzdUF6bklyaGRJT0l6WmxSN1IwMmV4RjREMHJNOS84dzQy?= =?utf-8?B?OXRLa0FoSGtmMmxwSlpmN1FTankwaER5THRHZTVPOUJLN3JCSVFUNmNxSzZa?= =?utf-8?B?YjRnZWhRL3RaaVUrRDNDb25TWHZZSDVqZXNtdVBoaDAxTlg3Nll3YmxmaHNv?= =?utf-8?B?MVkrMUlrWStKVVJaTzBOQzhMbERkMVJ2TFAydGgxeENVY29pempXdnVaWEdv?= =?utf-8?B?TkNjSnlFbUFNMXdtck8wNUNuR0NuOXBUOUZ4ckRUS0FWSnZLT3hqSm1OOTdF?= =?utf-8?B?OWxMMUhQT0VBZkp3MXBhNTNjcFNXTUR1endrZUExT25zT1BYeDAvU3puTFFt?= =?utf-8?B?MXM5Yy9ZTHlpbmZybzFzYXVQTjFWU0ZYcEQ4VzlobFdzZTh5N0I4cjBHdGEr?= =?utf-8?B?ZHdkTjBYS01LM0N2STdsQjk5TG1GSWpoUFZML0YvMDZ5WlF0UVlnYloybnpv?= =?utf-8?B?SHlZa2U3YTdnT05kUjZvMGZsSzFGeFdRTXAxZkprWTNUNDB2QTRZKzNjUnFm?= =?utf-8?B?d3dRVXlydC8wV1V1SjlENFZvTWJ6eFl2Vm5ZUHVKVWc4dVUrb3NUQnk4VEhJ?= =?utf-8?B?MG15Y25DL3J4YjZPY0ptRkxOc0xkYzhGdFVLWmt5djlhNVNSUFAvNmRYbzM0?= =?utf-8?B?ZERhMWNLRE9tL3daK0duK0tVaVhmMWFKb05aWHdwMnNSUHlEVC95Wk1rVnZM?= =?utf-8?B?VXJIWnFrelZLSW1LcmhqSjRUZDRIS0pwNDl3Tm5FSXRlQjlVbE5BaFZnaC93?= =?utf-8?B?S21zYXlldmQyT1NlRDJVMEE2d1QvZ3FVVnA1ckFhNWl3dGhURHRMdElOblMr?= =?utf-8?B?enV4QU9pUStzVWIxYlBCTXB4TnRtenM3b0JCMXZKaTJCb1NZTGtzaEJzQXRZ?= =?utf-8?B?U0I2eVdjb3VISy9kR3A5T0ZxWTdJa0FGK2IwOFBQNUJlRWxLZjF6TGFWQXJY?= =?utf-8?B?OCszdGE2VkxJWDF5V2JhSUZBVmJJbjRqRFhYZnRvaFd0OVNTWXhzKzZ3czZL?= =?utf-8?B?WVQzN3RxZWlhZDQxbTIwaERnckY4cUZKbFhQc1E5a1lKSUszc3g2dzRSaGpB?= =?utf-8?B?YTVPZmlqbThEeTlOZTdoOHNQSkU4VXNkcnNpaHVwTkExcXJCcGhmdFZNN2RX?= =?utf-8?B?VTlTYXhEejZNd29pUW1abEVqRjZubDhEa1k4Z2ZzQjVVYy9Ia3BlYkJvTkJO?= =?utf-8?B?b050NWhqcXdWbWQzV1oxTXNVL3hvR0N1NFA3YVl2a3JFZ1IvTEJXY2xyWllS?= =?utf-8?B?Q2ZJT0gyYmhzNURPZ2JRME1lRm5yMkVmOE1oUHRrM0oxRW9janMvMnJQTERY?= =?utf-8?B?TW5aeTQ2bC9CSTdvOFAvUVAyVGhIYmt2cnlkV1Avb3BubC82SEwxTWZLNHZH?= =?utf-8?Q?DxFN9NL8dtffUaqCjgCZMAcznled9AzzhOOqMGP?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 65bab281-1fc6-4544-375e-08d993ee3b9a X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Oct 2021 17:22:46.3656 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: tlendack@amd.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5071 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/20/21 11:45 AM, Sathyanarayanan Kuppuswamy wrote: > On 10/20/21 9:33 AM, Tom Lendacky wrote: >> On 10/8/21 7:37 PM, Kuppuswamy Sathyanarayanan wrote: ... >>>   bool force_dma_unencrypted(struct device *dev) >>>   { >>> -    return amd_force_dma_unencrypted(dev); >>> +    if (cc_platform_has(CC_ATTR_GUEST_TDX) && >>> +        cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT)) >>> +        return true; >>> + >>> +    if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT) || >>> +        cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT)) >>> +        return amd_force_dma_unencrypted(dev); >>> + >>> +    return false; >> >> Assuming the original force_dma_unencrypted() function was moved here or >> cc_platform.c, then you shouldn't need any changes. Both SEV and TDX >> require true be returned if CC_ATTR_GUEST_MEM_ENCRYPT returns true. And >> then TDX should never return true for CC_ATTR_HOST_MEM_ENCRYPT. > > > For non TDX case, in CC_ATTR_HOST_MEM_ENCRYPT, we should still call > amd_force_dma_unencrypted() right? What I'm saying is that you wouldn't have amd_force_dma_unencrypted(). I think the whole force_dma_unencrypted() can exist as-is in a different file, whether that's cc_platform.c or mem_encrypt_common.c. It will return true for an SEV or TDX guest, true for an SME host based on the DMA mask or else false. That should work just fine for TDX. Thanks, Tom > >> >>>   } >>> diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c >>> index 527957586f3c..6c531d5cb5fd 100644 >>> --- a/arch/x86/mm/pat/set_memory.c >>> +++ b/arch/x86/mm/pat/set_memory.c >>> @@ -30,6 +30,7 @@ >>>   #include >>>   #include >>>   #include >>> +#include >>>   #include "../mm_internal.h" >>> @@ -1981,8 +1982,10 @@ int set_memory_global(unsigned long addr, int >>> numpages) >>>                       __pgprot(_PAGE_GLOBAL), 0); >>>   } >>> -static int __set_memory_enc_dec(unsigned long addr, int numpages, bool >>> enc) >>> +static int __set_memory_protect(unsigned long addr, int numpages, bool >>> protect) >>>   { >>> +    pgprot_t mem_protected_bits, mem_plain_bits; >>> +    enum tdx_map_type map_type; >>>       struct cpa_data cpa; >>>       int ret; >>> @@ -1997,8 +2000,25 @@ static int __set_memory_enc_dec(unsigned long >>> addr, int numpages, bool enc) >>>       memset(&cpa, 0, sizeof(cpa)); >>>       cpa.vaddr = &addr; >>>       cpa.numpages = numpages; >>> -    cpa.mask_set = enc ? __pgprot(_PAGE_ENC) : __pgprot(0); >>> -    cpa.mask_clr = enc ? __pgprot(0) : __pgprot(_PAGE_ENC); >>> + >>> +    if (cc_platform_has(CC_ATTR_GUEST_SHARED_MAPPING_INIT)) { >>> +        mem_protected_bits = __pgprot(0); >>> +        mem_plain_bits = pgprot_cc_shared_mask(); >> >> How about having generic versions for both shared and private that >> return the proper value for SEV or TDX. Then this remains looking >> similar to as it does now, just replacing the __pgprot() calls with the >> appropriate pgprot_cc_{shared,private}_mask(). > > Makes sense. > >> >> Thanks, >> Tom >> >>> +    } else { >>> +        mem_protected_bits = __pgprot(_PAGE_ENC); >>> +        mem_plain_bits = __pgprot(0); >>> +    } >>> + >>> +    if (protect) { >>> +        cpa.mask_set = mem_protected_bits; >>> +        cpa.mask_clr = mem_plain_bits; >>> +        map_type = TDX_MAP_PRIVATE; >>> +    } else { >>> +        cpa.mask_set = mem_plain_bits; >>> +        cpa.mask_clr = mem_protected_bits; >>> +        map_type = TDX_MAP_SHARED; >>> +    } >>> + >>>       cpa.pgd = init_mm.pgd; >>>       /* Must avoid aliasing mappings in the highmem code */ >>> @@ -2006,9 +2026,17 @@ static int __set_memory_enc_dec(unsigned long >>> addr, int numpages, bool enc) >>>       vm_unmap_aliases(); >>>       /* >>> -     * Before changing the encryption attribute, we need to flush caches. >>> +     * Before changing the encryption attribute, flush caches. >>> +     * >>> +     * For TDX, guest is responsible for flushing caches on >>> private->shared >>> +     * transition. VMM is responsible for flushing on shared->private. >>>        */ >>> -    cpa_flush(&cpa, !this_cpu_has(X86_FEATURE_SME_COHERENT)); >>> +    if (cc_platform_has(CC_ATTR_GUEST_TDX)) { >>> +        if (map_type == TDX_MAP_SHARED) >>> +            cpa_flush(&cpa, 1); >>> +    } else { >>> +        cpa_flush(&cpa, !this_cpu_has(X86_FEATURE_SME_COHERENT)); >>> +    } >>>       ret = __change_page_attr_set_clr(&cpa, 1); >>> @@ -2021,18 +2049,21 @@ static int __set_memory_enc_dec(unsigned long >>> addr, int numpages, bool enc) >>>        */ >>>       cpa_flush(&cpa, 0); >>> +    if (!ret && cc_platform_has(CC_ATTR_GUEST_SHARED_MAPPING_INIT)) >>> +        ret = tdx_hcall_gpa_intent(__pa(addr), numpages, map_type); >>> + >>>       return ret; >>>   } >>>   int set_memory_encrypted(unsigned long addr, int numpages) >>>   { >>> -    return __set_memory_enc_dec(addr, numpages, true); >>> +    return __set_memory_protect(addr, numpages, true); >>>   } >>>   EXPORT_SYMBOL_GPL(set_memory_encrypted); >>>   int set_memory_decrypted(unsigned long addr, int numpages) >>>   { >>> -    return __set_memory_enc_dec(addr, numpages, false); >>> +    return __set_memory_protect(addr, numpages, false); >>>   } >>>   EXPORT_SYMBOL_GPL(set_memory_decrypted); >>> >