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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB9020.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 09736c58-f0b5-4932-344d-08d99559f2e9 X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Oct 2021 12:46:20.7622 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: peng.fan@nxp.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR04MB8694 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ahmad, > Subject: Re: [PATCH] clk: imx: gate off peripheral clock slice >=20 > Hello Peng, >=20 > On 22.10.21 15:09, Peng Fan (OSS) wrote: > > From: Peng Fan > > > > The Peripheral clocks are default enabled when SoC power on, and > > bootloader not gate off the clocks when booting Linux Kernel. > > > > So Linux Kernel is not aware the peripheral clocks are enabled and > > still take them as disabled because of enable count is zero. > > > > Then Peripheral clock's source without clock gated off could be > > changed when have assigned-parents in device tree > > > > However, per i.MX8M* reference mannual, "Peripheral clock slices must > > be stopped to change the clock source", so need to gate off the the > > peripheral clock when registering the clocks to avoid glitch. >=20 > This sounds like a fix that should be backported. If so, could you provid= e a > Fixes: Tag? We not see any critical issue without this patch, just to avoid any potential risk here. So I not add fix tag here. Abel, do you prefer a fixes tag or leave it as is? Thanks, Peng. >=20 > Thanks, > Ahmad >=20 > > > > Tested boot on i.MX8MM/P-EVK board > > > > Signed-off-by: Peng Fan > > --- > > drivers/clk/imx/clk-composite-8m.c | 9 ++++++++- > > 1 file changed, 8 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/clk/imx/clk-composite-8m.c > > b/drivers/clk/imx/clk-composite-8m.c > > index 2dfd6149e528..ee41fbf90589 100644 > > --- a/drivers/clk/imx/clk-composite-8m.c > > +++ b/drivers/clk/imx/clk-composite-8m.c > > @@ -184,6 +184,7 @@ struct clk_hw *__imx8m_clk_hw_composite(const > char *name, > > struct clk_mux *mux =3D NULL; > > const struct clk_ops *divider_ops; > > const struct clk_ops *mux_ops; > > + u32 val; > > > > mux =3D kzalloc(sizeof(*mux), GFP_KERNEL); > > if (!mux) > > @@ -216,8 +217,14 @@ struct clk_hw *__imx8m_clk_hw_composite(const > char *name, > > div->width =3D PCG_PREDIV_WIDTH; > > divider_ops =3D &imx8m_clk_composite_divider_ops; > > mux_ops =3D &clk_mux_ops; > > - if (!(composite_flags & IMX_COMPOSITE_FW_MANAGED)) > > + if (!(composite_flags & IMX_COMPOSITE_FW_MANAGED)) { > > flags |=3D CLK_SET_PARENT_GATE; > > + if (!(flags & CLK_IS_CRITICAL)) { > > + val =3D readl(reg); > > + val &=3D ~BIT(PCG_CGC_SHIFT); > > + writel(val, reg); > > + } > > + } > > } > > > > div->lock =3D &imx_ccm_lock; > > >=20 >=20 > -- > Pengutronix e.K. | > | > Steuerwalder Str. 21 | > https://eur01.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2Fwww.p > engutronix.de%2F&data=3D04%7C01%7Cpeng.fan%40nxp.com%7Cb5b827 > 20263e43680e9208d995597f48%7C686ea1d3bc2b4c6fa92cd99c5c301635% > 7C0%7C0%7C637705033902868076%7CUnknown%7CTWFpbGZsb3d8eyJWIj > oiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1 > 000&sdata=3DPolK7YYK66Bbyd6KJgINnvma8JZ6OdDZ8e1cp6rvIww%3D&a > mp;reserved=3D0 | > 31137 Hildesheim, Germany | Phone: > +49-5121-206917-0 | > Amtsgericht Hildesheim, HRA 2686 | Fax: > +49-5121-206917-5555 |