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Wysocki" , Kirti Wankhede , Jeremy Kerr , Rajat Jain , Jianxiong Gao , Dave Jiang , Saravana Kannan , Mauro Carvalho Chehab , openbmc@lists.ozlabs.org, devicetree@vger.kernel.org, Konrad Rzeszutek Wilk , Alex Williamson , Rob Herring , Bhaskar Chowdhury , Thomas Gleixner , Andrew Jeffery , Cornelia Huck , linux-kernel@vger.kernel.org, Vinod Koul , dmaengine@vger.kernel.org Subject: Re: [PATCH 4/5] driver core: inhibit automatic driver binding on reserved devices Message-ID: References: <627101ee-7414-57d1-9952-6e023b8db317@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="IBKYz2UKeI4sOQXI" Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --IBKYz2UKeI4sOQXI Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Oct 25, 2021 at 04:09:59PM +0200, Greg Kroah-Hartman wrote: > On Mon, Oct 25, 2021 at 09:02:40AM -0500, Patrick Williams wrote: > > On Mon, Oct 25, 2021 at 03:34:05PM +0200, Greg Kroah-Hartman wrote: > > > On Mon, Oct 25, 2021 at 08:20:05AM -0500, Patrick Williams wrote: > > > I think "it" is "something needs to be the moderator between the two > > > operating systems". What is the external entity that handles the > > > switching between the two? > >=20 > > Ah, ok. > >=20 > > Those usually end up being system / device specific. In the case of th= e BIOS > > flash, most designs I've seen use a SPI mux between the BMC and the host > > processor or IO hub (PCH on Xeons). The BMC has a GPIO to control the = mux. > >=20 > > As far as state, the BMC on start-up will go through a set of discovery= code to > > figure out where it left the system prior to getting reset. That invol= ves > > looking at the power subsystem and usually doing some kind of query to = the host > > to see if it is alive. These queries are mostly system / host-processo= r design > > specific. I've seen anything from an IPMI/IPMB message alert from the = BMC to > > the BIOS to ask "are you alive" to reading host processor state over JT= AG to > > figure out if the processors are "making progress". >=20 > But which processor is "in control" here over the hardware? =20 The BMC. It owns the GPIO that controls the SPI mux. =20 But, the BMC is responsible for doing all operations in a way that doesn't = mess up the running host processor(s). Pulling away the SPI flash containing the BIOS code at an incorrect time might do that. > What method > is used to pass the device from one CPU to another from a logical point > of view? =20 The state of the server as a whole is determined and maintained by the BMC.= I'm simplifying here a bit but the operation "turn on the host processors" impl= ies "the host processors will access the BIOS" so the BMC must ensure "SPI mux = is switched towards the host" before "turn on the host processors". > Sounds like it is another driver that needs to handle all of > this, so why not have that be the one that adds/removes the devices > under control here? If what you're describing is moving all of the state control logic into the kernel, I don't think that is feasible. For some systems it would mean mov= ing yet another entire IPMI stack into the kernel tree. On others it might be somewhat simpler, but it is still a good amount of code. We could probably write up more details on the scope of this. If what you're describing is a small driver, similar to the board support drivers that were used before the device tree, that instantiates subordinate devices it doesn't seem like an unreasonable alternative to DT overlays to = me (for whatever my limited kernel contribution experience counts for). --=20 Patrick Williams --IBKYz2UKeI4sOQXI Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEBGD9ii4LE9cNbqJBqwNHzC0AwRkFAmF20ysACgkQqwNHzC0A wRllog//fo/4DsHCATlBG2JbJ+kty/4DMaxw9s4LPzxMRjzAcpUNlU4aZU0MCE8I OscYTGpzhNhtddtAWjgJpLWLIokDJfdQ+K/fj/c/gV6lFgBzdRB8V3i4WKCnxb+s 1GZpKmb+f5AKRLz83jRe9bx8X4lBafvlt1Riwmz4wywVqrzKcB9wJDQHmM90hsCI XgJ82cdNBTYzw+tYl534zZiAU4qn6kq1+5oVi5qeCGMylF9dcZhnWdtyxSWNagSk FbcmxLztkVEuzxI0GWoJsUc8fKL/bJPCwIJzIs+/+mdwd5iINh3TFZ0Ik3SM/6+V 3GvaXafAyTrSFHwbd7BFdljgrnvteE81XLd8X+VHP3GZ/T2yFNRY381KuXMmC0ti X11xR+nNYVRtTrqZmmUPQ/FyQ2z6A30SzSdMav2y15SAVyoYY6KxU4/k+amxACzS n06PV7i+2LLGwl83I1vqzdLS7dTdXj0dyyP/EzxG1OSS65FnJ1F6GItJq4BAcDQL VhMVCegClPqjHUaKQsNRZLW6c0lfZJeVJG8Cl82TLPXb7eSAMT7OS0BG4pCnX+6L csbREZYtI3j9QSzEkeM14dAS322I3iiQPpubwSwHMn8OOG4mFj9K3paoEQXsG0yF C2bUFdioZUpiLRvmwFhkrOUOOavOjxRit7hIsDOSvCrUue4rKl8= =VXwf -----END PGP SIGNATURE----- --IBKYz2UKeI4sOQXI--