Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp601697pxb; Mon, 25 Oct 2021 14:42:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy79BYosyvkzjVSVb4coViSW1Gir9Ztsck/5eJtXK2w97aBJm7bsbrflpSikPPUSQ3UlNwr X-Received: by 2002:a17:902:7101:b0:140:3e2c:1cbe with SMTP id a1-20020a170902710100b001403e2c1cbemr13564388pll.83.1635198172230; Mon, 25 Oct 2021 14:42:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1635198172; cv=none; d=google.com; s=arc-20160816; b=ASNxONEKqqZL1fx7kpDAewsmC1S/d/z0bweqbLUo4Wd0D242bJ9tlqfp0xYjqJtL+Y U9liORBlGHDG+4737Ddg6yankthyceV8RPOcK9Q5MiT3bRMV4qz1RDfyGd4AO+6oiPcR EyHpmrB/IVSpgAFqyrkSj4ehzczzHWCWxaF5yyLpYm+zbke0vMG4pfdTJRKuQFMbWgp9 /PTr36Mb9YltjAjmW3iFuWHqh4BmZBDG1E8dmdMeKXJwFK0mKYrTnqSL6InKIgl1QnAe KYR8ORGxMFR1a/n3oUgg8GTSrn/+3m3Qn1p+/t637fTcag1J89hPGKhK/DCtoiZWiWf6 SZTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=ZE0JjpM0Q0zc0juqFDJv2RQLlUG83Wb6ZoaI1HZesAo=; b=v4Jxk0JEayoLXBqO6HQUKv9WklQFiGArioDhTy5yWVfRSIc9Q/JpDx4OhEar9e7Z37 f0+EiDFDjDlRzTDVV/bbjOtF9R9tBM1PHYcYhqJO52WcytnyVqsxKunnP/4xaseoUQgG f5WH/4WNqKSWfJN3/WMita1vA00dF2dscXgfqqruU8ZEmFhG/Lq32QPFoI3hb17jOpr2 uIVwZSRDDc1OYp5YqzfBq06MZHmFAfhXgaTd+PuNTc9EXVvnCh7l6+Y3cFxwpf+MIjFC jHXa3V1LNgXnB9BXWSqtNYmcC8M7Y4dAijcvn5cYomI6fVqRxZYHz6qHjn7Wudp6xnwr MpKw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Wq5mVuSh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id lp9si38187463pjb.42.2021.10.25.14.42.40; Mon, 25 Oct 2021 14:42:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Wq5mVuSh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231801AbhJYTLV (ORCPT + 99 others); Mon, 25 Oct 2021 15:11:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48712 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231350AbhJYTLU (ORCPT ); Mon, 25 Oct 2021 15:11:20 -0400 Received: from mail-ot1-x335.google.com (mail-ot1-x335.google.com [IPv6:2607:f8b0:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36E6EC061767 for ; Mon, 25 Oct 2021 12:08:58 -0700 (PDT) Received: by mail-ot1-x335.google.com with SMTP id l16-20020a9d6a90000000b0054e7ab56f27so16268537otq.12 for ; Mon, 25 Oct 2021 12:08:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=ZE0JjpM0Q0zc0juqFDJv2RQLlUG83Wb6ZoaI1HZesAo=; b=Wq5mVuShBIeBPE2dq1ZkvKSVLHMCfkf57+Einu/HhZmxCD936+t5cWrh/KjN8u8u0K P48MOo/AkfEKnUdQUQJwgpFMauNviKDltHCXjuOO5dB7SO4htW0KPOhnnyzWGlNpAqgv aw+6DDXpW7BFazuGsDdVTHA86MtUipaL/GF2XHzdCUvjJHQ/msCHiyA32AfNAGY8uDxG MtRoWsylBI8WXkOm1fyBw5l5tSh2aWMtaOjQ+8o/J5eiJuPKj5s+KH5eZF0qUGS+3zbn DBhWsQRKfF8xm5rcFoEMa+26LBBrHYLN7jj+RfqVJAuqE3d9wf3Drr3d+rvKXQd8PH4c uSqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=ZE0JjpM0Q0zc0juqFDJv2RQLlUG83Wb6ZoaI1HZesAo=; b=eQ6aBnHfr7FZJLOSxfcmQSj4/iInOT0l1ibGwHMu2YHBIaWjV4JH7Ur1q2jHM1Vm9h Sd1qEs/aBp0lea2HI7Hvwzjhr3fy24cOv1mOooiOUxKrA4YIGH96kZ0uaP5fex65/2Lx gCkF+gdcegEOO8AVbYEkAxK/JE7r9xtif80y1utlpnjqzMwa0U3V+j3rwtN4ll6edksO PWZI0cgVZ0qmyW2jj9cNLpkMyiiQwekDmulJoMVdzT+5CqUH+lsO3gZuO0+PgR+zikWM b8P58aNo4KbPlVvhJ4uuRO/4TPEbmoqKTIj12IZPDEG+wjHjECCgLXAwCkvExEYkI12+ Iz3Q== X-Gm-Message-State: AOAM532NU/DdXxzbP2Ayr1pPTE+ShP8jiR563rJELtYDKax/XtvkpTKe spl3lef9NC3VzwNOnL2diqqDQQ== X-Received: by 2002:a05:6830:1ad5:: with SMTP id r21mr14695613otc.98.1635188937533; Mon, 25 Oct 2021 12:08:57 -0700 (PDT) Received: from ripper ([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id k7sm1539121oiw.58.2021.10.25.12.08.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Oct 2021 12:08:57 -0700 (PDT) Date: Mon, 25 Oct 2021 12:10:35 -0700 From: Bjorn Andersson To: Sandeep Maheswaram Cc: Rob Herring , Andy Gross , Greg Kroah-Hartman , Felipe Balbi , Stephen Boyd , Doug Anderson , Matthias Kaehlcke , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, quic_pkondeti@quicinc.com, quic_ppratap@quicinc.com Subject: Re: [PATCH v2 1/3] dt-bindings: usb: qcom,dwc3: Add multi-pd bindings for dwc3 qcom Message-ID: References: <1635152851-23660-1-git-send-email-quic_c_sanm@quicinc.com> <1635152851-23660-2-git-send-email-quic_c_sanm@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1635152851-23660-2-git-send-email-quic_c_sanm@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon 25 Oct 02:07 PDT 2021, Sandeep Maheswaram wrote: > Add multi pd bindings to set performance state for cx domain > to maintain minimum corner voltage for USB clocks. > > Signed-off-by: Sandeep Maheswaram > --- > v2: > Make cx domain mandatory. > > Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml > index 2bdaba0..fd595a8 100644 > --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml > +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml > @@ -42,7 +42,13 @@ properties: > > power-domains: > description: specifies a phandle to PM domain provider node > - maxItems: 1 > + minItems: 2 > + items: > + - description: cx power domain > + - description: USB gdsc power domain > + > + required-opps: > + description: specifies the performance state to power domain I'm still worried about the fact that we can't just rely on the USB GDSC being a subdomin of CX in order to just "turn on" CX. Afaict accepting this path forward means that for any device that sits in a GDSC power domain we will have to replicate this series for the related driver. I mentioned this in v1, but I don't think we reached a conclusion. Regards, Bjorn > > clocks: > description: > -- > 2.7.4 >