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Message-ID: <20211026012851.GH2515@art_vandelay> References: <20211022165409.178281-1-markyacoub@chromium.org> <20211026011154.GE2515@art_vandelay> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211026011154.GE2515@art_vandelay> User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Oct 25, 2021 at 09:11:54PM -0400, Sean Paul wrote: > On Fri, Oct 22, 2021 at 12:54:02PM -0400, Mark Yacoub wrote: > > From: Mark Yacoub > > > > [Why] > > The Rotation prob is a bitmask value. It must always have a valid value. > > nit: s/prob/prop/ > > > A default NO rotation is equal to 1 not 0. > > > > [How] > > 1. At the reset hook, call __drm_atomic_helper_plane_reset which is > > called at the initialization of the plane and sets the default value of > > all planes to DRM_MODE_ROTATE_0 which is equal to 1. > > 2. At the ovl layer check, do no overwrite the state->rotation value 0 > > if DRM_MODE_ROTATE_0 is set. We should not change the value that the > > userspace has set, especially if it's an unsupported value. > > nit: I would probably split these into 2 patches since they're related but > different Did you decide not to remove the default value from the plane rotation value? I still think we should do that. Sean > > Sean > > > > > Tested on Jacuzzi(MTK). > > Fixes IGT@kms_properties@plane-properties-{legacy,atomic} and > > IGT@kms_properties@get_properties-sanity-{atomic,non-atomic} > > > > Signed-off-by: Mark Yacoub > > --- > > drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 +- > > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 20 +++++++------------- > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 5 ++--- > > drivers/gpu/drm/mediatek/mtk_drm_plane.c | 3 ++- > > 4 files changed, 12 insertions(+), 18 deletions(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h > > index 86c3068894b11..2fc566964f68e 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h > > @@ -64,7 +64,7 @@ void mtk_ovl_config(struct device *dev, unsigned int w, > > unsigned int h, unsigned int vrefresh, > > unsigned int bpc, struct cmdq_pkt *cmdq_pkt); > > int mtk_ovl_layer_check(struct device *dev, unsigned int idx, > > - struct mtk_plane_state *mtk_state); > > + const struct mtk_plane_state *mtk_state); > > void mtk_ovl_layer_config(struct device *dev, unsigned int idx, > > struct mtk_plane_state *state, > > struct cmdq_pkt *cmdq_pkt); > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > > index ea5760f856ec6..13999564304bc 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > > @@ -190,19 +190,15 @@ unsigned int mtk_ovl_supported_rotations(struct device *dev) > > } > > > > int mtk_ovl_layer_check(struct device *dev, unsigned int idx, > > - struct mtk_plane_state *mtk_state) > > + const struct mtk_plane_state *mtk_state) > > { > > - struct drm_plane_state *state = &mtk_state->base; > > - unsigned int rotation = 0; > > + const struct drm_plane_state *state = &mtk_state->base; > > + unsigned int rotation = drm_rotation_simplify( > > + state->rotation, > > + DRM_MODE_ROTATE_0 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y); > > > > - rotation = drm_rotation_simplify(state->rotation, > > - DRM_MODE_ROTATE_0 | > > - DRM_MODE_REFLECT_X | > > - DRM_MODE_REFLECT_Y); > > - rotation &= ~DRM_MODE_ROTATE_0; > > - > > - /* We can only do reflection, not rotation */ > > - if ((rotation & DRM_MODE_ROTATE_MASK) != 0) > > + /* We can only do reflection, not non-zero rotation */ > > + if (((rotation & ~DRM_MODE_ROTATE_0) & DRM_MODE_ROTATE_MASK) != 0) > > return -EINVAL; > > > > /* > > @@ -212,8 +208,6 @@ int mtk_ovl_layer_check(struct device *dev, unsigned int idx, > > if (state->fb->format->is_yuv && rotation != 0) > > return -EINVAL; > > > > - state->rotation = rotation; > > - > > return 0; > > } > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > > index 1b582262b682b..530bdd031933f 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > > @@ -53,9 +53,8 @@ struct mtk_ddp_comp_funcs { > > void (*disable_vblank)(struct device *dev); > > unsigned int (*supported_rotations)(struct device *dev); > > unsigned int (*layer_nr)(struct device *dev); > > - int (*layer_check)(struct device *dev, > > - unsigned int idx, > > - struct mtk_plane_state *state); > > + int (*layer_check)(struct device *dev, unsigned int idx, > > + const struct mtk_plane_state *state); > > void (*layer_config)(struct device *dev, unsigned int idx, > > struct mtk_plane_state *state, > > struct cmdq_pkt *cmdq_pkt); > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c > > index e6dcb34d30522..accd26481b9fb 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c > > @@ -44,9 +44,10 @@ static void mtk_plane_reset(struct drm_plane *plane) > > state = kzalloc(sizeof(*state), GFP_KERNEL); > > if (!state) > > return; > > - plane->state = &state->base; > > } > > > > + __drm_atomic_helper_plane_reset(plane, &state->base); > > + > > state->base.plane = plane; > > state->pending.format = DRM_FORMAT_RGB565; > > } > > -- > > 2.33.0.1079.g6e70778dc9-goog > > > > -- > Sean Paul, Software Engineer, Google / Chromium OS -- Sean Paul, Software Engineer, Google / Chromium OS