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Peter Anvin" Subject: [PATCH V4 14/50] x86/entry: Expose the address of .Lgs_change to entry64.c Date: Tue, 26 Oct 2021 22:27:46 +0800 Message-Id: <20211026142824.18362-4-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20211026141420.17138-1-jiangshanlai@gmail.com> References: <20211026141420.17138-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Lai Jiangshan The address of .Lgs_change will be used in traps.c in later patch when some entry code is implemented in entry64.c. So the address of .Lgs_change is exposed to traps.c for preparation. The label .Lgs_change is still needed in ASM code for extable due to it can not use asm_load_gs_index_gs_change. Otherwise: warning: objtool: __ex_table+0x0: don't know how to handle non-section reloc symbol asm_load_gs_index_gs_change Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry64.c | 2 ++ arch/x86/entry/entry_64.S | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/entry/entry64.c b/arch/x86/entry/entry64.c index 762595603ce7..9813a30dbadb 100644 --- a/arch/x86/entry/entry64.c +++ b/arch/x86/entry/entry64.c @@ -12,3 +12,5 @@ * is PTI user CR3 or both. */ #include + +extern unsigned char asm_load_gs_index_gs_change[]; diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index c8f7b740a9f1..daaeeb8acd22 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -731,6 +731,7 @@ _ASM_NOKPROBE(common_interrupt_return) SYM_FUNC_START(asm_load_gs_index) FRAME_BEGIN swapgs +SYM_INNER_LABEL(asm_load_gs_index_gs_change, SYM_L_GLOBAL) .Lgs_change: movl %edi, %gs 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE @@ -1009,7 +1010,7 @@ SYM_CODE_START_LOCAL(error_entry) movl %ecx, %eax /* zero extend */ cmpq %rax, RIP+8(%rsp) je .Lbstep_iret - cmpq $.Lgs_change, RIP+8(%rsp) + cmpq $asm_load_gs_index_gs_change, RIP+8(%rsp) jne .Lerror_entry_done_lfence /* -- 2.19.1.6.gb485710b