Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp492310pxb; Wed, 27 Oct 2021 06:55:05 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy3BgnXdr3yittGRVo/PhtCPOlawGfvt6SK7Ep2lIu2gSGWea7pR6Zrybk3LVXKdqRUoNDL X-Received: by 2002:a63:2d46:: with SMTP id t67mr23878638pgt.15.1635342905348; Wed, 27 Oct 2021 06:55:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1635342905; cv=none; d=google.com; s=arc-20160816; b=CcDEOiqmJ97LAcp2tfYbaLW8pICJu85NKxNSNJ+Ruaf/CFnub8Ciu1/TOSJTq2gMje 3BLR/OvJMKbStjsRapkpwIkU9pfjnjWSuooYifaB5My24Kc6SHtGw7mD5cfhayHY1YAx UCOw6wNAjdRlDr3tcViKlVxX6WujWvW/5hmDYcMDm/zzF8lBgpnyLvR/dzOAoNa0PxR2 vMZyRPoAvsqCyFEWJl0ROFxVpHX4SYBs6cvPjGHbXxlD9ewpeUVuy+r4aOJ25c7/E27j E9+8Db1X6asqitjeYUA5SeKjLbXIda6tndBIilvQW9z/aw7j+3Rsx4p8J0x8qdDJCa0V LCQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:user-agent:from :references:in-reply-to:mime-version:dkim-signature; bh=pO6hebzYNrv+/+pOVUyyRcxmOyAEdYQyaagcCX4YDnU=; b=ax0TRUZPVpNL92E609/BKe6TR1tv5nswF8vPxKszHjpoCF31wOpv3+mLngAMESFr6T 3ERfHW/2OdEGXCkfQ79NCa5vqIlwmgNpdZO2n3S7Km4ONPZ5G/zReB9nnxey+1RWdruZ CZ129qpgZQXilgkGVx8nDUdZKa7lGrJCiBfTYC3NeQ6RxYQgJy91QRayde7k7ghaIldk Yw0e0mEGPWbMtEJAfyY2JiWAGIvmfG8bm2HVIT7PIRQy3aoLn8DESOSauTcUuHN/vUbK BMLhem1l9+oCWeA7VpNcxb2EPp+jMrpp+ON4KvlNrsyJgi+SkgDcDnd701Sz949ptYP6 UdMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=kZTlKRIg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a3si16577pjm.157.2021.10.27.06.54.52; Wed, 27 Oct 2021 06:55:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=kZTlKRIg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233642AbhJ0Aun (ORCPT + 99 others); Tue, 26 Oct 2021 20:50:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232164AbhJ0Aul (ORCPT ); Tue, 26 Oct 2021 20:50:41 -0400 Received: from mail-ot1-x334.google.com (mail-ot1-x334.google.com [IPv6:2607:f8b0:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8FFBCC061570 for ; Tue, 26 Oct 2021 17:48:16 -0700 (PDT) Received: by mail-ot1-x334.google.com with SMTP id l16-20020a9d6a90000000b0054e7ab56f27so1195795otq.12 for ; Tue, 26 Oct 2021 17:48:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:in-reply-to:references:from:user-agent:date:message-id :subject:to:cc; bh=pO6hebzYNrv+/+pOVUyyRcxmOyAEdYQyaagcCX4YDnU=; b=kZTlKRIgEp17ei/WKStDhVd9uZFLymxrV+fql/20idR53mABoNwMzTsCl+FN+FIKwR Lz6NHPSBNnZoCrSKhle+4q2PazxCKjejYmJS99QqZ4wBZxCvMfB0eE/n9GIjxkTanxkr Sf3KKI/8Zi+xrSdD+NhJ6fy/An+KHG6z5iOYA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:in-reply-to:references:from :user-agent:date:message-id:subject:to:cc; bh=pO6hebzYNrv+/+pOVUyyRcxmOyAEdYQyaagcCX4YDnU=; b=X/fjvjCznEdrom0bM9SNyI3GZH8EC9fs1/dSubR0HCD1UmTwXIlxEdX8NS1v3znB9x 6U3VEJ/8vz61vBMwrOwFHw6+h/7Q+8JhqNX1X0fHvlCTz8IoVNv5x4TMbVt3lX6K70ku msuG/oa756UrBrIbKhd6yQD2NwITKeX9zeW2lIdy0pDIjf74x/kdA3aW1D753rEHQMVk DJRU2Vga7w/BlKm0g9gJzNUUG+/6C7O/EiPFv3BQIbOibEDwmsQ4fakyr17nNfS5VlAZ mF13RWrpU01n5F9nqG59cLtB1/Y5tKCZQYQjPcowheahF+yGWSqu019MQnMastu1uSUK WrZA== X-Gm-Message-State: AOAM5304I0Ftg7S3Jyj+DdNsBd8TDPg94KNhNU/Qglj4fgT++2pzXeis JtbNw8pjZUfxd94TASRYC3kcM1+oK2U3YRCqq1Bv8Q== X-Received: by 2002:a9d:12f4:: with SMTP id g107mr22343738otg.77.1635295695952; Tue, 26 Oct 2021 17:48:15 -0700 (PDT) Received: from 753933720722 named unknown by gmailapi.google.com with HTTPREST; Tue, 26 Oct 2021 17:48:15 -0700 MIME-Version: 1.0 In-Reply-To: References: <1635152851-23660-1-git-send-email-quic_c_sanm@quicinc.com> <1635152851-23660-2-git-send-email-quic_c_sanm@quicinc.com> From: Stephen Boyd User-Agent: alot/0.9.1 Date: Tue, 26 Oct 2021 17:48:15 -0700 Message-ID: Subject: Re: [PATCH v2 1/3] dt-bindings: usb: qcom,dwc3: Add multi-pd bindings for dwc3 qcom To: Bjorn Andersson Cc: Ulf Hansson , Viresh Kumar , Sandeep Maheswaram , Rob Herring , Andy Gross , Greg Kroah-Hartman , Felipe Balbi , Doug Anderson , Matthias Kaehlcke , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, quic_pkondeti@quicinc.com, quic_ppratap@quicinc.com, Rajendra Nayak Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org +Rajendra Quoting Bjorn Andersson (2021-10-25 19:48:02) > On Mon 25 Oct 15:41 PDT 2021, Stephen Boyd wrote: > > > > > When the binding was introduced I recall we punted on the parent child > > conversion stuff. One problem at a time. There's also the possibility > > for a power domain to be parented by multiple power domains so > > translation tables need to account for that. > > > > But for this case - and below display case - the subdomain (the device's > power-domain) is just a dumb gate. So there is no translation, the given > performance_state applies to the parent. Or perhaps such implicitness > will come back and bite us? In the gate case I don't see how the implicitness will ever be a problem. > > I don't think we allow a power-domain to be a subdomain of two > power-domains - and again it's not applicable to USB or display afaict. Ah maybe. I always confuse power domains and genpd. > > > > > > > > Or we may need to make another part of the OPP binding to indicate the > > > > relationship between the power domain and the OPP and the parent of > > > > the power domain. > > > > > > I suspect this would be useful if a power-domain provider needs to > > > translate a performance_state into a different supply-performance_state. > > > Not sure if we have such case currently; these examples are all an > > > adjustable power-domain with "gating" subdomains. > > > > Even for this case, we should be able to have the GDSC map the on state > > to some performance state in the parent domain. Maybe we need to add > > some code to the gdsc.c file to set a performance state on the parent > > domain when it is turned on. I'm not sure where the value for that perf > > state comes from. I guess we can hardcode it in the driver for now and > > if it needs to be multiple values based on the clk frequency we can push > > it out to an OPP table or something like that. > > > > For the GDSC I believe we only have 1:1 mapping, so implementing > set_performance_state to just pass that on to the parent might do the > trick (although I haven't thought this through). > > Conceptually I guess this would be like calling clk_set_rate() on a > clock gate, relying on it being propagated upwards. The problem here is > that the performance_state is just a "random" integer without a well > defined unit. > Right. Ideally it would be in the core code somehow so that if there isn't a set_performance_state function we go to the parent or some special return value from the function says "call it on my parent". The translation scheme could come later so we can translate the "random" integer between parent-child domains. At the end of the day the device driver wants to set a frequency or runtime pm get the device and let the OPP table or power domain code figure out what the level is supposed to be. > > > The one case where I believe we talked about having different mapping > between the performance_state levels was in the relationship between CX > and MX. But I don't think we ever did anything about that... Hmm alright. I think there's a constraint but otherwise nobody really wants to change both at the same time. > > > > Yes, a GDSC is really a gate on a parent power domain like CX or MMCX, > > etc. Is the display subsystem an example of different clk frequencies > > wanting to change the perf state of CX? If so it's a good place to work > > out the translation scheme for devices that aren't listing the CX power > > domain in DT. > > Yes, the various display components sits in MDSS_GDSC but the opp-tables > needs to change the performance_state of MDSS_GDSC->parent (i.e. CX or > MMCX, depending on platform). > > As I said, today we hack this by trusting that the base drm/msm driver > will keep MDSS_GDSC on and listing MMCX (or CX) as power-domain for each > of these components. > > > So if we solve this, then that seems to directly map to the static case > for USB as well. > Got it. So in this case we could have the various display components that are in the mdss gdsc domain set their frequency via OPP and then have that translate to a level in CX or MMCX. How do we parent the power domains outside of DT? I'm thinking that we'll need to do that if MMCX is parented by CX or something like that and the drivers for those two power domains are different. Is it basic string matching?