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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id o12sm5133885oti.21.2021.10.26.19.36.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Oct 2021 19:36:28 -0700 (PDT) Received: (nullmailer pid 3844748 invoked by uid 1000); Wed, 27 Oct 2021 02:36:27 -0000 Date: Tue, 26 Oct 2021 21:36:27 -0500 From: Rob Herring To: Fenglin Wu Cc: Andy Gross , collinsd@codeaurora.org, Bjorn Andersson , sboyd@kernel.org, linux-kernel@vger.kernel.org, maz@kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, tglx@linutronix.de, David Collins , Rob Herring , subbaram@codeaurora.org Subject: Re: [PATCH v2 08/10] bindings: spmi: spmi-pmic-arb: mark interrupt properties as optional Message-ID: References: <1634621361-17155-1-git-send-email-quic_fenglinw@quicinc.com> <1634621361-17155-9-git-send-email-quic_fenglinw@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1634621361-17155-9-git-send-email-quic_fenglinw@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 19 Oct 2021 13:29:19 +0800, Fenglin Wu wrote: > From: David Collins > > Mark all interrupt related properties as optional instead of > required. Some boards do not required PMIC IRQ support and it > isn't needed to handle SPMI bus transactions, so specify it as > optional. > > Signed-off-by: David Collins > Signed-off-by: Fenglin Wu > --- > Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt | 2 ++ > 1 file changed, 2 insertions(+) > Acked-by: Rob Herring