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[95.91.233.173]) by smtp.gmail.com with ESMTPSA id j10sm7140198wrx.94.2021.10.27.03.34.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Oct 2021 03:34:13 -0700 (PDT) From: shiva.linuxworks@gmail.com X-Google-Original-From: sshivamurthy@micron.com To: tudor.ambarus@microchip.com, michael@walle.cc, p.yadav@ti.com, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Shivamurthy Shastri Subject: [PATCH 4/4] mtd: spi-nor: micron-st: add mt25qu128abb and mt25ql128abb Date: Wed, 27 Oct 2021 10:33:52 +0000 Message-Id: <20211027103352.8879-5-sshivamurthy@micron.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211027103352.8879-1-sshivamurthy@micron.com> References: <20211027103352.8879-1-sshivamurthy@micron.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Shivamurthy Shastri Added new Micron SPI NOR flashes to structure flash_info, which supports advanced protection and security features. Signed-off-by: Shivamurthy Shastri --- drivers/mtd/spi-nor/micron-st.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c index b5d82e85fb92..2bebd76b091a 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -158,10 +158,17 @@ static const struct flash_info st_parts[] = { SECT_4K | SPI_NOR_QUAD_READ) }, { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) }, + { "mt25qu128abb", INFO6(0x20bb18, 0x12008c, 64 * 1024, 256, + SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | + SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) }, { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) }, + { "mt25ql128abb", INFO6(0x20ba18, 0x12008c, 64 * 1024, 256, + SECT_4K | USE_FSR | SPI_NOR_HAS_LOCK | + SPI_NOR_QUAD_READ) }, { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, { "mt25ql256a", INFO6(0x20ba19, 0x104400, 64 * 1024, 512, -- 2.25.1