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[89.77.68.124]) by smtp.gmail.com with ESMTPSA id a28sm71719ljd.65.2021.10.27.01.38.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 Oct 2021 01:38:09 -0700 (PDT) Subject: Re: [PATCH v1 1/2] clocksource/drivers/exynos_mct_v2: introduce Exynos MCT version 2 driver for next Exynos SoC To: Youngmin Nam Cc: daniel.lezcano@linaro.org, tglx@linutronix.de, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, pullip.cho@samsung.com, hoony.yu@samsung.com, hajun.sung@samsung.com, myung-su.cha@samsung.com References: <20211021061804.39118-1-youngmin.nam@samsung.com> <20211021061804.39118-2-youngmin.nam@samsung.com> From: Krzysztof Kozlowski Message-ID: <117dfec8-e417-642b-7647-9d17592826ad@canonical.com> Date: Wed, 27 Oct 2021 10:38:09 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20211021061804.39118-2-youngmin.nam@samsung.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/10/2021 08:18, Youngmin Nam wrote: > Exynos MCT version 2 is composed of 1 FRC and 12 comparators. > The 12 comparators can produces interrupts independently, > so they can be used as local timer of each CPU. > ... > + > +static void exynos_mct_comp_start(struct mct_clock_event_device *mevt, > + bool periodic, unsigned long cycles) > +{ > + unsigned int index = mevt->comp_index; > + unsigned int comp_enable; > + unsigned int loop_cnt = 0; > + > + comp_enable = readl_relaxed(reg_base + EXYNOS_MCT_COMP_ENABLE(index)); > + if (comp_enable == MCT_COMP_ENABLE) > + exynos_mct_comp_stop(mevt); > + > + if (periodic) > + writel_relaxed(MCT_COMP_CIRCULAR_MODE, reg_base + EXYNOS_MCT_COMP_MODE(index)); > + > + writel_relaxed(cycles, reg_base + EXYNOS_MCT_COMP_PERIOD(index)); This is unsigned long, so 64-bit on your platform. Use writeq_relaxed or handle it somehow. Best regards, Krzysztof