Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp1611276pxb; Thu, 28 Oct 2021 06:59:09 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyiq5LF4ULU1+5M+0pGTEsOgyJ6wyfTfJ2Z9l2xs7xExDUGQcnYM/M+iJ3VQEhvmREzi0UT X-Received: by 2002:a05:6a00:124f:b0:47b:f6cf:b78c with SMTP id u15-20020a056a00124f00b0047bf6cfb78cmr4623122pfi.79.1635429549172; Thu, 28 Oct 2021 06:59:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1635429549; cv=none; d=google.com; s=arc-20160816; b=L63wXJt8cAWKwsn3Mt4T9AwXzqauhRbmMnf78fEmqQ1xo2UzdU77QibkNYqixOJfRj 0xwwNvvoXb7THeA+DDNRiaczsWpIiKfWKD3ho6AUqAxNSH/Yzpd1d8oFH23YJk7U/s0J o6r8b/vASjvfepujwtD4JfDRPbIQ9rObZ0vV4e84EsAWtS3WluBFuP7MoI11nPtSJooQ tR/2rPUcgZCPkItemLGh4OFUQBsysBYsU6T++cdX5IqQ9wIHDBmq3z4HN3yxEUCQO66m RoL6ixOQS62KWnBeP4drus3NwvJwbYmd40e9mEMNTxyff8kqQb61panfjoEFg0d5g/Vs 1ICw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=7kDBcdiXpWrty+HRtZ1SGGrWg+fRbTMRynpf5hoOf40=; b=d3UxZj+cAfa02x7jzp1vA8MPVFj9KGjsRFsAY61T6j0OhFI4XzBn1zFDgCe6+g6cJ+ OZiCzj2DeO90gw91CUX8su8+gSLmdvlC49U+VFcHpey7n3CaM0slmrmzONqcQ2hYJgnp HIln82tV1Jzj+B6eXMohvwLlhtsXcQtR2GPfFB8iSWfjDAtt9i8d/lJU903KB8bmSyao XO9RNUeaAgxbtJbxoBb94ht8b1KAoOQBo/KX8eVrK/UZVst4AM0ufRJEg4Kbt15iL6gx hVqlY2pq9Xq5HCmJVAsYF4hN13jIXLf0f9jAXAKalV6RrxrtZdeInekt+6XNWOOOl1x1 BB9A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id gf3si2505991pjb.180.2021.10.28.06.58.57; Thu, 28 Oct 2021 06:59:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230370AbhJ1OAP (ORCPT + 99 others); Thu, 28 Oct 2021 10:00:15 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:42514 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S230441AbhJ1OAK (ORCPT ); Thu, 28 Oct 2021 10:00:10 -0400 X-UUID: 0451979e83e94840b4987c38a3560eb0-20211028 X-UUID: 0451979e83e94840b4987c38a3560eb0-20211028 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 892179986; Thu, 28 Oct 2021 21:57:41 +0800 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Thu, 28 Oct 2021 21:57:40 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs10n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Thu, 28 Oct 2021 21:57:40 +0800 From: YC Hung To: , , , CC: , , , , , , , , , Subject: [PATCH v4 0/2] Add code to manage DSP clocks and provide dts-binding document Date: Thu, 28 Oct 2021 21:57:35 +0800 Message-ID: <20211028135737.8625-1-yc.hung@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: "yc.hung" This code is based on top of SOF topic/sof-dev branch and we want to have a review with ALSA and device Tree communities the it will be merged to SOF tree and then merged into ALSA tree. It provides two patches, one is for mt8195 dsp clocks related. Another is for mt8195 dsp dts binding decription. YC Hung (2): ASoC: SOF: mediatek: Add mt8195 dsp clock support dt-bindings: dsp: mediatek: Add mt8195 DSP binding support .../bindings/dsp/mtk,mt8195-dsp.yaml | 139 +++++++++++++++ sound/soc/sof/mediatek/adsp_helper.h | 2 +- sound/soc/sof/mediatek/mt8195/Makefile | 2 +- sound/soc/sof/mediatek/mt8195/mt8195-clk.c | 158 ++++++++++++++++++ sound/soc/sof/mediatek/mt8195/mt8195-clk.h | 28 ++++ sound/soc/sof/mediatek/mt8195/mt8195.c | 22 ++- 6 files changed, 347 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.c create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.h -- 2.18.0