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References: <20211019084449.1411060-1-horatiu.vultur@microchip.com> <20211019084449.1411060-4-horatiu.vultur@microchip.com> <163548971798.15791.952778566228263608@swboyd.mtv.corp.google.com> <20211029093556.tdvroyommqi5xb6g@soft-dev3-1.localhost>
Subject: Re: [RFC PATCH 3/3] clk: lan966x: Extend lan966x clock driver for clock gating support
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     mturquette@baylibre.com, robh+dt@kernel.org,
        nicolas.ferre@microchip.com, kavyasree.kotagiri@microchip.com,
        eugen.hristev@microchip.com, linux-clk@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
To:     Horatiu Vultur <horatiu.vultur@microchip.com>
Date:   Fri, 29 Oct 2021 16:32:34 -0700
Message-ID: <163555035420.15791.5764699436982333377@swboyd.mtv.corp.google.com>
User-Agent: alot/0.9.1
Precedence: bulk

Quoting Horatiu Vultur (2021-10-29 02:35:56)
> The 10/28/2021 23:41, Stephen Boyd wrote:
>=20
> Hi Stephen,
>=20
> >=20
> > Quoting Horatiu Vultur (2021-10-19 01:44:49)
> > > diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
> > > index 19bec94e1551..40be47092a31 100644
> > > --- a/drivers/clk/clk-lan966x.c
> > > +++ b/drivers/clk/clk-lan966x.c
> > > @@ -188,26 +202,64 @@ static struct clk_hw *lan966x_gck_clk_register(=
struct device *dev, int i)
> > >         return &priv->hw;
> > >  };
> > >
> > > +static int lan966x_gate_clk_register(struct device *dev,
> > > +                                    struct clk_hw_onecell_data *hw_d=
ata,
> > > +                                    void __iomem *gate_base)
> > > +{
> > > +       int i;
> > > +
> > > +       for (i =3D GCK_GATE_UHPHS; i < N_CLOCKS; ++i) {
> > > +               int idx =3D i - GCK_GATE_UHPHS;
> > > +
> > > +               hw_data->hws[i] =3D
> > > +                       clk_hw_register_gate(dev, clk_gate_desc[idx].=
name,
> >=20
> > Use devm?
>=20
> I couldn't find any devm_clk_hw_register_gate or something similar for
> the gate.

Add one?

>=20
> >=20
> > > +                                            "lan966x", 0, base,
> > > +                                            clk_gate_desc[idx].bit_i=
dx,
> > > +                                            0, &clk_gate_lock);
> > > +
> > > +               if (IS_ERR(hw_data->hws[i]))
> > > +                       return dev_err_probe(dev, PTR_ERR(hw_data->hw=
s[i]),
> > > +                                            "failed to register %s c=
lock\n",
> > > +                                            clk_gate_desc[idx].name);
> > > +       }
> > > +
> > > +       return 0;
> > > +}
> > > +
> > > +static void lan966x_gate_clk_unregister(struct clk_hw_onecell_data *=
hw_data)
> > > +{
> > > +       int i;
> > > +
> > > +       for (i =3D GCK_GATE_UHPHS; i < N_CLOCKS; ++i)
> >=20
> > for (int i =3D
> >=20
> > should suffice
>=20
> That would not work. I will get the error:
> error: =E2=80=98for=E2=80=99 loop initial declarations are only allowed i=
n C99 or C11 mode

Ah ok