Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp627818pxb; Fri, 29 Oct 2021 17:07:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz5gF2RBweFhQzTvHnqQcP0E+6Hs4OwtaMEA0BUVlRprCNt3wF93b0ANl+WbreP0X6TFs8M X-Received: by 2002:a17:906:c205:: with SMTP id d5mr17118786ejz.528.1635552456294; Fri, 29 Oct 2021 17:07:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1635552456; cv=none; d=google.com; s=arc-20160816; b=TS6VZ7xIFC+jLsldus3fApabVB4Fhi1ZhO08K/8oaQwyNvdeouxZk8gPN+XD079M2S XwQI0ovK9ijs9RIMOOe1rNKY2qk7dgAvq5/qWqx4M9y1a119od/2wgbxuqLOySas+VUh tFTx7Uagb6NAR/S4E1L5DJC26SV2cSmMeTJWGQi9Q1VauK+5Rs5zEUwbH6smcgK7uB/T m3nH3APaxQAm2F8STtrlZSZPbkUSfxZSITMB5FgHc+gL7XQya1xVQw+wbndBvyQ8O4+E XfOawJhXZVdMfqp5iN9CDkDTtLRXVXxZz4zwYPm3c1vqZRV5nrKFjem6bNhxr5sGuqfj iU2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=vuv6n62jDWE8u0opD6apgzQE/FP+71A+OqFXqw5Bbbk=; b=XDF6somBzWG9+hPkaNupRD265bSyM02O+Kzq4w8HRosBZzGbQQSGMO2h9Ou61CDozP YcBNKwE8h7EO1u2IpHilfre0PixTpSecfcpDCb9XtquR/KUqxIeycURPOjFlgFF08T0p u2AWtVxWYabS3zn9yEv34SXoY/oab63tsofDi/DdqGpgHjfSN4aSW8uFAAwyZVgz+sFP +WNb3vnQ2z/ai5iUY7Z6bS44Le+mVg1ZOQzOh0ZTndmno1qLZI226/zU51a+1e50ytXC zhst5EtvJgk5DCGhJlBqHzXk+/q0jlBTi5x3qXitK4urFT7zcjn28FSSWUaRZRefTCsE bXgg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=AJr0u8iP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id o8si8756306edi.429.2021.10.29.17.06.49; Fri, 29 Oct 2021 17:07:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=AJr0u8iP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231867AbhJ3AE4 (ORCPT + 99 others); Fri, 29 Oct 2021 20:04:56 -0400 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:49424 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231822AbhJ3AEt (ORCPT ); Fri, 29 Oct 2021 20:04:49 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1635552140; x=1667088140; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=vuv6n62jDWE8u0opD6apgzQE/FP+71A+OqFXqw5Bbbk=; b=AJr0u8iPxVEBwi2R1kBOHTTgA8wtMunND96ORAmxJF+137Ec0tQ4szhA VC/rZvFTnDl/UEmZFYkcPis+J8e6RT6nYI44EwkT1Hxge0DZxysE/R00E wwXSAcrOF1oaVGg3yvr7+LG0znbixsi9lf2iakgSxpxv8MwByHhT5Amaw A=; Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-01.qualcomm.com with ESMTP; 29 Oct 2021 17:02:20 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg02-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2021 17:02:19 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.7; Fri, 29 Oct 2021 17:02:19 -0700 Received: from hu-vamslank-sd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.7; Fri, 29 Oct 2021 17:02:18 -0700 From: To: , , , , , , CC: , , , , , Vamsi krishna Lanka Subject: [PATCH v3 3/3] ARM: dts: qcom: sdx65: Add pincontrol node Date: Fri, 29 Oct 2021 17:02:05 -0700 Message-ID: <1635552125-16407-4-git-send-email-quic_vamslank@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1635552125-16407-1-git-send-email-quic_vamslank@quicinc.com> References: <1635552125-16407-1-git-send-email-quic_vamslank@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Vamsi krishna Lanka This commit adds pincontrol node to SDX65 dts. Signed-off-by: Vamsi Krishna Lanka --- arch/arm/boot/dts/qcom-sdx65.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 5aecb00..796641d 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -91,6 +91,18 @@ status = "disabled"; }; + tlmm: pinctrl@f100000 { + compatible = "qcom,sdx65-tlmm"; + reg = <0xf100000 0x300000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&tlmm 0 0 109>; + interrupt-controller; + interrupt-parent = <&intc>; + #interrupt-cells = <2>; + }; + pdc: interrupt-controller@b210000 { compatible = "qcom,sdx65-pdc", "qcom,pdc"; reg = <0xb210000 0x10000>; -- 2.7.4