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Date:   Mon, 01 Nov 2021 09:27:39 +0000
Message-ID: <87ee809qes.wl-maz@kernel.org>
From:   Marc Zyngier <maz@kernel.org>
To:     Anup Patel <anup@brainfault.org>
Cc:     Guo Ren <guoren@kernel.org>,
        Nikita Shubin <nikita.shubin@maquefel.me>,
        Atish Patra <atish.patra@wdc.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Heiko =?UTF-8?B?U3TDvGJuZXI=?= <heiko@sntech.de>,
        Rob Herring <robh@kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        linux-riscv <linux-riscv@lists.infradead.org>,
        Guo Ren <guoren@linux.alibaba.com>
Subject: Re: [PATCH V5 3/3] irqchip/sifive-plic: Fixup thead, c900-plic request_threaded_irq with ONESHOT
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On Mon, 01 Nov 2021 04:27:50 +0000,
Anup Patel <anup@brainfault.org> wrote:

> The RISC-V AIA will totally replace RISC-V PLIC going forward. In fact,
> RISC-V AIA APLIC addresses all limitations of RISC-V PLIC along with
> new features additions.

Instead of arguing about yet another piece of RISC-V vapourware, how
about you guys propose a patch that would actually make the *current*
HW work to some extent?

	M.

-- 
Without deviation from the norm, progress is not possible.