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Date:   Mon, 1 Nov 2021 15:30:21 -0500
From:   Rob Herring <robh@kernel.org>
To:     Robert Foss <robert.foss@linaro.org>
Cc:     todor.too@gmail.com, agross@kernel.org, bjorn.andersson@linaro.org,
        mchehab@kernel.org, angelogioacchino.delregno@somainline.org,
        linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
        Andrey Konovalov <andrey.konovalov@linaro.org>
Subject: Re: [PATCH v1 2/2] media: dt-bindings: media: camss: Document
 clock-lanes property
Message-ID: <YYBOXQOXM8USks0G@robh.at.kernel.org>
References: <20211025103322.160913-1-robert.foss@linaro.org>
 <20211025103322.160913-2-robert.foss@linaro.org>
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On Mon, Oct 25, 2021 at 12:33:22PM +0200, Robert Foss wrote:
> The clock-lanes property corresponds to a hardware register field
> that is required to be set, in order to enable the CSI clock signal.
> 
> The physical lane of the clock signal is not programmable, but only
> togglable On or Off, which what BIT(7) of the
> CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(5) register controls.
> 
> Signed-off-by: Robert Foss <robert.foss@linaro.org>
> ---
>  .../devicetree/bindings/media/qcom,msm8996-camss.yaml        | 5 +++++
>  .../devicetree/bindings/media/qcom,sdm660-camss.yaml         | 5 +++++
>  .../devicetree/bindings/media/qcom,sdm845-camss.yaml         | 5 +++++
>  3 files changed, 15 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml
> index 38be41e932f0..d4da1fad12cf 100644
> --- a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml
> +++ b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml
> @@ -106,6 +106,11 @@ properties:
>  
>              properties:
>                clock-lanes:
> +                description:
> +                  The index of the clock-lane is not programmable by
> +                  the hardware, but is required to define a CSI port.
> +                  Lane 7 reflects the hardware register field that enables
> +                  the clock lane.

If it is fixed, then it should not be required. Fix the required part.

>                  items:
>                    - const: 7

I don't know how we let that in, but this should be the lane number. 
Each binding can't be making up its own interpretation.

Rob