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Miller" , Jakub Kicinski , Yevhen Orlov , "Vadym Kochan [C]" , Networking , Linux Kernel Mailing List Subject: Re: [PATCH] [-next] net: marvell: prestera: Add explicit padding Thread-Topic: [PATCH] [-next] net: marvell: prestera: Add explicit padding Thread-Index: AQHXz93a3E+bAU9+gECDkTpGNukWQQ== Date: Tue, 2 Nov 2021 11:36:19 +0000 Message-ID: References: <20211102082433.3820514-1-geert@linux-m68k.org> In-Reply-To: Accept-Language: en-GB, uk-UA, en-US Content-Language: en-GB X-MS-Has-Attach: X-MS-TNEF-Correlator: suggested_attachment_session_id: 0ca14783-9e80-ee4f-3b53-5359a06a1de0 x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 4b409c78-0d31-4171-e559-08d99df4fd5c x-ms-traffictypediagnostic: BY5PR18MB3170: x-ld-processed: 70e1fb47-1155-421d-87fc-2e58f638b6e0,ExtAddr x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8882; x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: aTIhytXpwuTr86nKEgsUP4GI1ZoZupru7l53MfB2kPV7aohaiOnVJoUycv+KaodYMMzPetnVLyH2ArPaCENoJrAMSsEeZ/tLbiEa8jRF23DTfad04PTaBJDNj2zoayG0IIA8ixX3exwfGV2rEgYaopdBEfxs/0cILNsREVcGfmGA/W8w7RANWaoOeqxSf+S7hbiTLAvIsn6UWOEiml1uCAEFXJXGNViWzRN7ftKFGh2iSRGf9lrse099+g7z9tMPLksj4vAPxPMc/U5A7BQNWcx88x8rKAo4y0C0rpbVU2ljRm5Isfwf0j99VXthr11T/H09zPvbekfwvikSuvp17X6p6MtGf6kk2ekZ32xC3DQ1ne1XOZ4EIqXcgDCNYroVmhZn2d/4niQva8+EALVe6kZYGr16A61ivU81YiImZgqMIoP2hUCVzWUIt1wpMiHbT0dgX3vtNT2ROU6C4XfKnTcdwCZpQljQ/bOJvXwYXuTGa223cp26ESIuNA0VNzCiBUra4qhYb37Z0yyOBCm3uVIxyxXXg1689+yDRD+ZXDd9Ak/wbOpgWGL1Y0meusvuGfVg3vzKcwnadNAisJ/QAst1yv+Y/YTsFGsVyVUWdrCcOcJho+6jruFjexVO8U/XGlVG0FF7YDiYpVk3p1uVWXkQN6UyZ3lNDXaRjUwxuE0dfn4uT1t7mAIl1OKdJYZMyQFTeh7zSo77khosJtMQW835G3uLImVwg4df3kHS8e1Q1lit0f1JZxJcsCc1CIk1B6bdoB7iYKhkYAFTSKQjEV47ziDlVK1YE+jsyd6PJTM= x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR18MB4009.namprd18.prod.outlook.com;PTR:;CAT:NONE;SFS:(4636009)(366004)(26005)(508600001)(38070700005)(9686003)(186003)(122000001)(55016002)(2906002)(83380400001)(38100700002)(4326008)(52536014)(8676002)(5660300002)(966005)(6506007)(76116006)(66946007)(7696005)(86362001)(53546011)(110136005)(66476007)(33656002)(66446008)(64756008)(66556008)(71200400001)(8936002)(54906003)(316002);DIR:OUT;SFP:1101; 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charset="Windows-1252" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: marvell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR18MB4009.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4b409c78-0d31-4171-e559-08d99df4fd5c X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Nov 2021 11:36:19.5730 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: SyYKlEC8kqISAO4x1onjgrYYBW1mGq2VH9UEivbNMfzAa47Ij58ZocCfL7z9Qx8cqsuw/Tje0sUFuiz4nu7gFg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR18MB3170 X-Proofpoint-GUID: 62MUDd20wjzQfU3FDK947ztPA-cGQwpW X-Proofpoint-ORIG-GUID: 62MUDd20wjzQfU3FDK947ztPA-cGQwpW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-02_07,2021-11-02_01,2020-04-07_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi All,=0A= =0A= For some unknown reason, the bb5dbf2cc64d5cfa ("net: marvell: prestera: add= firmware v4.0 support") changes have been merged into net-next w/o review = comments addressed and waiting for the final patch set to be uploaded. Any = idea why ?=0A= =0A= Right now, I'm working on fixing all the issues/comments and rebasing them = based on latest net-next master. Also, my changes include those posted in t= his thread to fix m68k build and comments related to structure pack/align.= =0A= =0A= Should I rebase my changes based on yours now ? Is it possible to make a re= lation chain ?=0A= =0A= The bb5dbf2cc64d5cfa mail thread discussion (waiting for new v5 patchset to= be uploaded) can be found at:=0A= =0A= [PATCH net-next v4] net: marvell: prestera: add firmware v4.0 support= =0A= https://www.spinics.net/lists/kernel/msg4127689.html=0A= =0A= Regards,=0A= Volodymyr=0A= =0A= > On Tue, Nov 2, 2021 at 9:24 AM Geert Uytterhoeven = wrote:=0A= > >=0A= > > On m68k:=0A= > >=0A= > >=A0=A0=A0=A0 In function =91prestera_hw_build_tests=92,=0A= > >=A0=A0=A0=A0=A0=A0=A0=A0 inlined from =91prestera_hw_switch_init=92 at d= rivers/net/ethernet/marvell/prestera/prestera_hw.c:788:2:=0A= > >=A0=A0=A0=A0 ././include/linux/compiler_types.h:335:38: error: call to = =91__compiletime_assert_345=92 declared with attribute error: BUILD_BUG_ON = failed: sizeof(struct prestera_msg_switch_attr_req) !=3D 16=0A= > >=A0=A0=A0=A0 ...=0A= > >=0A= > > The driver assumes structure members are naturally aligned, but does no= t=0A= > > add explicit padding, thus breaking architectures where integral values= =0A= > > are not always naturally aligned (e.g. on m68k, __alignof(int) is 2, no= t=0A= > > 4).=0A= > >=0A= > > Fixes: bb5dbf2cc64d5cfa ("net: marvell: prestera: add firmware v4.0 sup= port")=0A= > > Signed-off-by: Geert Uytterhoeven =0A= > =0A= > Looks good to me,=0A= > =0A= > Reviewed-by: Arnd Bergmann =0A= > =0A= > > Compile-tested only.=0A= > >=0A= > > BTW, I sincerely doubt the use of __packed on structs like:=0A= > >=0A= > >=A0=A0=A0=A0 union prestera_msg_switch_param {=0A= > >=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 mac[ETH_ALEN];=0A= > >=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 __le32 ageing_timeout_ms;=0A= > >=A0=A0=A0=A0 } __packed;=0A= > >=0A= > > This struct is only used as a member in another struct, where it is=0A= > > be naturally aligned anyway.=0A= > =0A= > Agreed, this __packed attribute is clearly bogus and should be removed.= =0A= > =0A= > Same for=0A= > =0A= > +struct prestera_msg_event_port_param {=0A= > +=A0=A0=A0=A0=A0=A0 union {=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 struct {=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 op= er;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 __le3= 2 mode;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 __le3= 2 speed;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 du= plex;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 fc= ;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 fe= c;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 } __packed mac;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 struct {=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 md= ix;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 __le6= 4 lmode_bmap;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 fc= ;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 } __packed phy;=0A= > +=A0=A0=A0=A0=A0=A0 } __packed;=0A= > +} __packed __aligned(4);=0A= > =0A= > This makes no sense at all. I would suggest marking only=0A= > the individual fields that are misaligned as __packed, but=0A= > not the structure itself.=0A= > =0A= > and then there is this=0A= > =0A= > +=A0=A0=A0=A0=A0=A0 union {=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 struct {=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 ad= min:1;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 fc= ;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 ap= _enable;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 union= {=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0 struct {=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 __le32 mode;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8=A0 inband:1;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 __le32 speed;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8=A0 duplex;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8=A0 fec;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8=A0 fec_supp;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0 } __packed reg_mode;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0 struct {=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 __le32 mode;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 __le32 speed;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8=A0 fec;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8=A0 fec_supp;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0 } __packed ap_modes[PRESTERA_AP_PORT_MAX];=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 } __p= acked;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 } __packed mac;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 struct {=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 ad= min:1;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 ad= v_enable;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 __le6= 4 modes;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 __le3= 2 mode;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 md= ix;=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 } __packed phy;=0A= > +=A0=A0=A0=A0=A0=A0 } __packed link;=0A= > =0A= > which puts misaligned bit fields in the middle of a packed structure!=0A= >=0A= >=A0=A0=A0=A0=A0=A0 Arnd=