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Date:   Tue, 2 Nov 2021 11:41:21 -0500
From:   Rob Herring <robh@kernel.org>
To:     Richard Zhu <hongxing.zhu@nxp.com>
Cc:     l.stach@pengutronix.de, vkoul@kernel.org,
        linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
        galak@kernel.crashing.org, shawnguo@kernel.org,
        tharvey@gateworks.com, devicetree@vger.kernel.org,
        linux-imx@nxp.com, kishon@ti.com,
        linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de,
        marcel.ziswiler@toradex.com
Subject: Re: [PATCH v5 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and
 name properties
Message-ID: <YYFqMaByELGuWOCu@robh.at.kernel.org>
References: <1635820355-27009-1-git-send-email-hongxing.zhu@nxp.com>
 <1635820355-27009-4-git-send-email-hongxing.zhu@nxp.com>
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On Tue, 02 Nov 2021 10:32:30 +0800, Richard Zhu wrote:
> i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties
> in the binding document.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Reviewed-by: Tim Harvey <tharvey@gateworks.com>
> Tested-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>