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Wed, 3 Nov 2021 21:42:57 +0000 Received: from [172.17.173.69] (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 3 Nov 2021 21:42:56 +0000 Subject: Re: [RFC v2 04/11] dt-bindings: Add HTE bindings To: Rob Herring CC: , , , , , , , , , References: <20210930232617.6396-1-dipenp@nvidia.com> <20210930232617.6396-5-dipenp@nvidia.com> X-Nvconfidentiality: public From: Dipen Patel Message-ID: Date: Wed, 3 Nov 2021 14:43:55 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Content-Language: en-US X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c5283be0-2dd6-4a1e-1d35-08d99f12e6fb X-MS-TrafficTypeDiagnostic: CH2PR12MB4070: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Nov 2021 21:42:57.8442 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c5283be0-2dd6-4a1e-1d35-08d99f12e6fb X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT023.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4070 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, On 10/8/21 3:11 PM, Rob Herring wrote: > On Thu, Sep 30, 2021 at 04:26:10PM -0700, Dipen Patel wrote: >> Introduces HTE devicetree binding details for the HTE subsystem. It >> includes examples for the consumers, binding details for the providers >> and specific binding details for the Tegra194 based HTE providers. >> > This pattern of binding isn't easily checked completely by schema. You > need a dtc check added too. Should be a 2 line change. (And dtc changes > go upstream first). Sorry, I could not understand your comment. Can you please elaborate? > >> Signed-off-by: Dipen Patel >> --- >> Changes in v2: >> - Replace hte with hardware-timestamp for property names >> - Renamed file >> - Removed example from the common dt binding file. >> >> .../hte/hardware-timestamps-common.yaml | 29 +++++++ >> .../devicetree/bindings/hte/hte-consumer.yaml | 48 +++++++++++ >> .../bindings/hte/nvidia,tegra194-hte.yaml | 79 +++++++++++++++++++ >> 3 files changed, 156 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/hte/hardware-timestamps-common.yaml >> create mode 100644 Documentation/devicetree/bindings/hte/hte-consumer.yaml >> create mode 100644 Documentation/devicetree/bindings/hte/nvidia,tegra194-hte.yaml >> >> diff --git a/Documentation/devicetree/bindings/hte/hardware-timestamps-common.yaml b/Documentation/devicetree/bindings/hte/hardware-timestamps-common.yaml >> new file mode 100644 >> index 000000000000..8b8db3bc4dcf >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/hte/hardware-timestamps-common.yaml >> @@ -0,0 +1,29 @@ >> +# SPDX-License-Identifier: GPL-2.0 > Dual license new bindings. Do you mean to add SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) instead? > >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/hte/hardware-timestamps-common.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Hardware timestamp providers >> + >> +maintainers: >> + - Dipen Patel >> + >> +description: | >> + Some devices/SoCs have hardware time stamping engines which can use hardware >> + means to timestamp entity in realtime. The entity could be anything from >> + GPIOs, IRQs, Bus and so on. The hardware timestamp engine (HTE) present >> + itself as a provider with the bindings described in this document. >> + >> +properties: >> + $nodename: >> + pattern: "^hardware-timestamps(@.*|-[0-9a-f])*$" > "^hardware-timestamp(@.*|-[0-9a-f])?$" > >> + >> + "#hardware-timestamps-cells": > Double plural: > > #hardware-timestamp-cells > > Arguably, the same string everywhere would have been an easier design, > but let's keep consistency with (most) other flavors of this pattern. > >> + description: >> + Number of cells in a HTE specifier. >> + >> +required: >> + - "#hardware-timestamps-cells" >> + >> +additionalProperties: true >> diff --git a/Documentation/devicetree/bindings/hte/hte-consumer.yaml b/Documentation/devicetree/bindings/hte/hte-consumer.yaml >> new file mode 100644 >> index 000000000000..cf65d1d44a18 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/hte/hte-consumer.yaml >> @@ -0,0 +1,48 @@ >> +# SPDX-License-Identifier: GPL-2.0 >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/hte/hte-consumer.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: HTE Consumer Device Tree Bindings >> + >> +maintainers: >> + - Dipen Patel >> + >> +description: | >> + HTE properties should be named "hardware-timestamps". The exact meaning of >> + each hardware-timestamps property must be documented in the device tree >> + binding for each device. An optional property "hardware-timestamps-names" may >> + contain a list of strings to label each of the HTE devices listed in the >> + "hardware-timestamps" property. >> + >> + The "hardware-timestamps-names" property if specified is used to map the name >> + of the HTE device requested by the devm_of_hte_request_ts() or of_hte_request_ts >> + call to an index into the list given by the "hardware-timestamps" property. >> + >> +properties: >> + hardware-timestamps: >> + $ref: /schemas/types.yaml#/definitions/phandle-array >> + description: >> + The list of HTE provider phandle. The provider must document the number >> + of cell that must be passed in this property along with phandle. >> + >> + hardware-timestamps-names: > hardware-timestamp-names > > >> + $ref: /schemas/types.yaml#/definitions/string-array >> + description: >> + An optional string property. >> + >> +required: >> + - "hardware-timestamps" > Don't need quotes. > >> + >> +dependencies: >> + hardware-timestamps-names: [ hardware-timestamps ] >> + >> +additionalProperties: true >> + >> +examples: >> + - | >> + hte_irq_consumer { >> + hardware-timestamps = <&tegra_hte_lic 0x19>; >> + hardware-timestamps-names = "hte-irq"; >> + }; >> diff --git a/Documentation/devicetree/bindings/hte/nvidia,tegra194-hte.yaml b/Documentation/devicetree/bindings/hte/nvidia,tegra194-hte.yaml >> new file mode 100644 >> index 000000000000..529926118f35 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/hte/nvidia,tegra194-hte.yaml >> @@ -0,0 +1,79 @@ >> +# SPDX-License-Identifier: GPL-2.0 >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/hte/nvidia,tegra194-hte.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Tegra194 on chip generic hardware timestamping engine (HTE) >> + >> +maintainers: >> + - Dipen Patel >> + >> +description: | >> + Tegra194 SoC has multiple generic hardware timestamping engines which can >> + monitor subset of GPIO and on chip IRQ lines for the state change, upon >> + detection it will record timestamp (taken from system counter) in its >> + internal hardware FIFO. It has bitmap array arranged in 32bit slices where > has a bitmap > >> + each bit represent signal/line to enable or disable for the hardware >> + timestamping. >> + >> +properties: >> + compatible: >> + enum: >> + - nvidia,tegra194-gte-aon >> + - nvidia,tegra194-gte-lic >> + >> + reg: >> + maxItems: 1 >> + >> + interrupts: >> + maxItems: 1 >> + >> + int-threshold: > nvidia,int-threshold unless this is common for all hw timestamps? > >> + description: >> + HTE device generates its interrupt based on this u32 FIFO threshold >> + value. The recommended value is 1. >> + minimum: 1 >> + maximum: 256 >> + >> + slices: > nvidia,slices > > Needs a type. > >> + description: >> + HTE lines are arranged in 32 bit slice where each bit represents different >> + line/signal that it can enable/configure for the timestamp. It is u32 >> + property and depends on the HTE instance in the chip. >> + enum: [3, 11] >> + >> + '#hardware-timestamps-cells': >> + const: 1 >> + >> +required: >> + - compatible >> + - reg >> + - interrupts >> + - slices >> + - "#hardware-timestamps-cells" >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + tegra_hte_aon: hardware-timestamps@c1e0000 { >> + compatible = "nvidia,tegra194-gte-aon"; >> + reg = <0xc1e0000 0x10000>; >> + interrupts = <0 13 0x4>; >> + int-threshold = <1>; >> + slices = <3>; >> + #hardware-timestamps-cells = <1>; >> + }; >> + >> + - | >> + tegra_hte_lic: hardware-timestamps@3aa0000 { >> + compatible = "nvidia,tegra194-gte-lic"; >> + reg = <0x3aa0000 0x10000>; >> + interrupts = <0 11 0x4>; >> + int-threshold = <1>; >> + slices = <11>; >> + #hardware-timestamps-cells = <1>; >> + }; >> + >> +... >> -- >> 2.17.1 >> >>