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From:   Wei Fu <wefu@redhat.com>
Date:   Sun, 7 Nov 2021 15:12:51 +0800
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Subject: Re: [RESEND PATCH V3 0/2] riscv: add RISC-V Svpbmt Standard Extension supports
To:     Guo Ren <guoren@kernel.org>
Cc:     Christoph Hellwig <hch@lst.de>,
        Palmer Dabbelt <palmerdabbelt@google.com>,
        Anup Patel <Anup.Patel@wdc.com>,
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HI Guo=EF=BC=8C Christoph,

Thanks for your suggestion.

On Tue, Nov 2, 2021 at 4:51 PM Guo Ren <guoren@kernel.org> wrote:
>
> Thx Christoph,
>
> On Tue, Nov 2, 2021 at 1:59 PM Christoph Hellwig <hch@lst.de> wrote:
> >
> > On Tue, Nov 02, 2021 at 10:07:58AM +0800, Guo Ren wrote:
> > >
> > > To separate MMU & no-MMU clearly, I suggest fuwei add
> > > #if defined(CONFIG_64BIT) && defined(CONFIG_MMU)
> >
> > Actually - for documentation purposes a new CONFIG_RISCV_SVPBMT that
> > depends on 64BIT && MMU would probably much better as it clearly
> > documents the intent here.
> Okay

How about

config RISCV_SVPBMT
bool
depends on 64BIT && MMU
default y


>
>
> --
> Best Regards
>  Guo Ren
>
> ML: https://lore.kernel.org/linux-csky/
>